LAXP2-17E-5QN208E Lattice, LAXP2-17E-5QN208E Datasheet - Page 63

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LAXP2-17E-5QN208E

Manufacturer Part Number
LAXP2-17E-5QN208E
Description
IC FPGA AUTO 17K LUTS 208-PQFP
Manufacturer
Lattice
Datasheet

Specifications of LAXP2-17E-5QN208E

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAXP2-17E-5QN208E
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
LA-LatticeXP2 Internal Switching Characteristics
t
t
t
t
t
t
t
t
PLL Parameters
t
t
DSP Block Timing
t
t
t
t
t
t
t
t
t
t
t
1. Internal parameters are characterized, but not tested on every device.
2. RST resets VCO and all counters in PLL.
3. These parameters include the Adder Subtractor block in the path.
Timing v. A 0.12
HWREN_EBR
SUCE_EBR
HCE_EBR
RSTO_EBR
SUBE_EBR
HBE_EBR
RSTREC_EBR
RST_EBR
RSTKREC_PLL
RSTREC_PLL
SUI_DSP
HI_DSP
SUP_DSP
HP_DSP
SUO_DSP
HO_DSP
COI_DSP
COP_DSP
COO_DSP
SUADSUB
HADSUB
Parameter
3
3
3
Hold Write/Read Enable to EBR Memory (Write/Read Clk)
Clock Enable Setup Time to EBR Output Register (Read Clk)
Clock Enable Hold Time to EBR Output Register (Read Clk)
Reset To Output Delay Time from EBR Output Register (Asynchronous)
Byte Enable Set-Up Time to EBR Output Register
Byte Enable Hold Time to EBR Output Register Dynamic Delay on Each PIO
Asynchronous reset recovery time for EBR
Asynchronous reset time for EBR
After RSTK De-assert, Recovery Time Before Next Clock Edge Can Toggle 
K-divider Counter
After RST De-assert, Recovery Time Before Next Clock Edge Can Toggle 
M-divider Counter (Applies to M-Divider Portion of RST Only
Input Register Setup Time
Input Register Hold Time
Pipeline Register Setup Time
Pipeline Register Hold Time
Output Register Setup Time
Output Register Hold Time
Input Register Clock to Output Time
Pipeline Register Clock to Output Time
Output Register Clock to Output Time
AdSub Input Register Setup Time
AdSub Input Register Hold Time
Over Recommended Operating Conditions
Description
3-19
2
)
DC and Switching Characteristics
LA-LatticeXP2 Family Data Sheet
1
(Continued)
-0.131
-0.159
-0.031
-1.006
-1.791
-0.331
0.217
0.178
0.209
0.351
1.012
1.012
0.168
3.101
6.002
0.375
Min.
-5
1.544
1.544
2.420
0.639
5.447
Max.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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