ELANSC410-66AC AMD (ADVANCED MICRO DEVICES), ELANSC410-66AC Datasheet - Page 111

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ELANSC410-66AC

Manufacturer Part Number
ELANSC410-66AC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ELANSC410-66AC

Lead Free Status / Rohs Status
Not Compliant

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Notes:
1. LDEV is checked on the following rising edge of the CPU clock (not shown, up to 100 MHz) from the assertion of ADS. ADS
can assert a minimum of 20 ns after address change.
Symbol
t10
t12
t13
t14
t8
t11
t1
t2
t3
t4
t5
t6
t7
t9
1
Parameter Description
VL_LCLK period
VL_LCLK pulse High
VL_LCLK pulse Low
VL_ADS delay from VL_LCLK
SA25–SA2, VL_BE3–VL_BE0, VL_M/IO, VL_W/R, VL_D/C delay from
VL_LCLK
VL_BLAST valid from VL_LCLK
VL_LDEV valid from SA25–SA2, VL_BE3–VL_BE0, VL_M/IO, VL_W/R,
VL_D/C
VL_LDEV setup to VL_LCLK
VL_LRDY, VL_BRDY setup to VL_LCLK
VL_LRDY, VL_BRDY (VL-Bus target is driver) hold from VL_LCLK
VL_LRDY (VL-Bus target is driver) three stated from VL_LCLK
Read data setup to VL_LCLK
Read data hold from VL_CLK
Write data delay from VL_CLK
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
Table 39. VESA Local Bus Cycles
External Bus
Min
27
14
14
15
12
3
3
3
5
0
3
0
33-MHz
Max
18
18
18
18
20
0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
111

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