ELANSC410-66AC AMD (ADVANCED MICRO DEVICES), ELANSC410-66AC Datasheet - Page 7

• Manufacturer Part Number: ELANSC410-66AC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ELANSC410-66AC

• Lead Free Status / Rohs Status: Not Compliant

LOGIC SYMBOL—ÉLANSC410 MICROCONTROLLER
Notes:
by firmware configuration. [[ ]] = Alternate function selected by a hardware configuration pin state at power-on reset. This does not
apply to [[BNDSCN_TCK]], [[BNDSCN_TMS]], [[BNDSCN_TDI]], and [[BNDSCN_TDO]]. These functions are enabled by the
BNDSCN_EN signal.
/ =Two functions available on the pin at the same time. { } = Function during hardware reset. [ ] = Alternative function selected
VESA Local Bus
Infrared Interface
Power
Management
Interface
GPIO/ISA
Interface
GPIO/
Power Control
Scan Keyboard
Columns/IRQs/XT
Keyboard Interface
Scan Keyboard
Rows/ISA Interface
Scan Keyboard
Rows/DRAM
Interface
8-Pin Serial Port
GPIOs
GPIO/External
Buffer Control
KBD COL1-0 [XT_CLK/DATA]
KBD_ROW13 [[R32BFOE]]
SUS_RES / KBD_ROW14
GPIO_CS3 [[DBUFRDH]]
GPIO_CS2 [[DBUFRDL]]
KBD_COL6-2 / PIRQ7-3
GPIO_CS4 [[DBUFOE]]
GPIO_CS6 [IOCHRDY]
KBD_ROW7 [PDACK1]
GPIO_CS11 [PDACK0]
KBD_ROW12 [MCS16]
KBD_ROW8 [PDRQ1]
GPIO_CS12 [PDRQ0]
KBD_ROW3 [CASH3]
KBD_ROW2 [CASH2]
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
KBD_ROW11 [SBHE]
KBD_ROW10 [BALE]
KBD_ROW6 [MA12]
KBD_ROW1 [CASL3]
KBD_ROW0 [CASL2]
GPIO_CS5 [IOCS16]
KBD_ROW9 [PIRQ2]
KBD_ROW5 [RAS3]
KBD_ROW4 [RAS2]
GPIO_CS7 [PIRQ1]
GPIO_CS8 [PIRQ0]
GPIO_CS10 [AEN]
DTR, RTS, SOUT
CTS, DCD, DSR
GPIO_CS9 [TC]
GPIO19 [LBL2]
BL0 [CLK_IO]
GPIO_CS13
GPIO_CS14
KBD_COL7
VL_BLAST
GPIO_CS0
GPIO_CS1
VL_LCLK
VL_BRDY
VL_LDEV
VL_LRDY
RIN, SIN
BL2–BL1
VL_ADS
SIROUT
VL_M/IO
VL_W/R
VL_BE2
VL_BE1
VL_BE0
GPIO15
GPIO16
GPIO17
GPIO18
VL_BE3
VL_D/C
VL_RST
GPIO20
SIRIN
ACIN
Microcontroller
ÉlanSC410
292 BGA
SD15–SD0 [D31–D16]
32KXTAL1, 32KXTAL2
ROMCS1–ROMCS0
CASL/H1–CASL/H0
GPIO29 [SLCTIN]
GPIO27 [ERROR]
GPIO21 [PPDWE]
GPIO22 [PPOEN]
[[BNDSCN_TCK]]
[[BNDSCN_TMS]]
[[BNDSCN_TDI]]
[[BNDSCN_TDO]]
GPIO24 [BUSY]
GPIO31 [STRB]
GPIO30 [AFDT]
GPIO23 [SLCT]
GPIO25 [ACK]
GPIO28 [INIT]
LF_INT, LF_LS
GPIO26 [PE]
BNDSCN_EN
RAS1–RAS0
MA3 {CFG3}
MA1 {CFG1}
MA0 {CFG0}
MA11–MA5
SA25–SA0
BBATSEN
RSTDRV
ROMWR
ROMRD
V
D15–D0
RESET
MEMW
LF_HS
MEMR
SPKR
MWE
CC
MA4
MA2
IOW
IOR
_RTC
VL, ROM, and ISA
Address
ROM/Flash Memory
Control
Boundary Scan
Interface
Parallel Port or
GPIOs
Loop Filters
Reset
DRAM Interface
and Feature
Configuration Pins
DRAM, VL, ROM,
and ISA Data
ISA Bus Command
and Reset
RTC
Speaker
Boundary Scan
Enable
32-kHz Crystal
7