ELANSC410-66AC AMD (ADVANCED MICRO DEVICES), ELANSC410-66AC Datasheet - Page 80

• Manufacturer Part Number: ELANSC410-66AC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ELANSC410-66AC

• Lead Free Status / Rohs Status: Not Compliant

Graphics Dot Clock PLL (ÉlanSC400 Microcontroller Only)
The input clock to the Graphics Dot Clock PLL is the
output clock (36.864 MHz) of the Low-Speed PLL di-
vided by 16. The Graphics Dot Clock PLL is not sup-
ported on the ÉlanSC410 microcontroller. The output
frequency is programmable using three extended reg-
ister bits (PLLRATIO[2–0]) in the range of 20.736 MHz
to 36.864 MHz (spaced 2.304 MHz apart). These three
bits (in graphics index register 4Ch) control the output
80
PLLRATIO[2–0]
Table 27. Frequency Selection Control for
000
001
010
011
100
101
110
111
Reference
Frequency
Feedback
Frequency
Graphics Dot Clock PLL
(Fr)
(Ff)
Divider
Figure 8. Intermediate and Low-Speed PLLs Block Diagram
10
11
12
13
14
15
16
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
9
Detector
Phase
Frequency Output (Fo)
Divider
Output Frequency
20.736
25.344
27.648
29.952
32.256
36.864
(MHz)
23.04
34.56
Down
Up
frequency by selecting the divide value in the feedback
divider as shown in Table 27.
The Graphics Dot Clock PLL requires a stabilization
period after changing frequency. Figure 9 shows the
block diagram for the Graphics Dot Clock PLL.
VCO
Charge
Pump
Vc
Internal External
Loop
VCCA
R
C
1
Filter
C
2