SAA7146AH NXP Semiconductors, SAA7146AH Datasheet - Page 47

• Manufacturer Part Number: SAA7146AH
• Manufacturer: NXP Semiconductors

Specifications of SAA7146AH

• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
Table 45 Event Counter set 2 Register (EC2R)
Table 46 Event Counter set 1 Source Select Register 1 (EC1SSR)
Table 47 Event Counter set 2 Source Select Register (EC2SSR)
Table 48 Status Bit Addresses (SBA)
2004 Aug 25
11C
E4
E8
00
01
02
03
OFFSET
OFFSET
OFFSET
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
(HEX)
(HEX)
(HEX)
ADDRESS
(HEX)
EC5 [9:0]
EC4 [9:0]
EC3 [11:0] 11 to 0
ECS2 [5:0] 23 to 18 RW
ECEN2
ECCLR2
ECS1 [5:0] 15 to 10 RW
ECEN1
ECCLR1
ECS0 [5:0] 7 to 2
ECEN0
ECCLR0
ECS5 [5:0] 23 to 18 RW
ECEN5
ECCLR5
ECS4 [5:0] 15 to 10 RW
ECEN4
ECCLR4
ECS3 [5:0] 7 to 2
ECEN3
ECCLR3
NAME
NAME
NAME
PPEF
PABO
PPED
RPS_I1
STATUS BIT
31 to 22 R
21 to 12 R
31 to 24
17
16
9
8
1
0
31 to 24
17
16
9
8
1
0
BIT
BIT
BIT
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
TYPE
R
TYPE
TYPE
Event Counter Five: this is the fourth 10-bit counter
Event Counter Four: this is the third 10-bit counter
Event Counter Three: this is the second 12-bit counter
reserved
Event Counter 2 Source: this 6 bit value addresses one of the status bits
Event Counter 2 Enable: if this bit is set event counter 2 is enabled
Event Counter 2 Clear: writing a logic 1 to this bit will clear event counter 2
Event Counter 1 Source: this 6 bit value addresses one of the status bits
Event Counter 1 Enable: if this bit is set event counter 1 is enabled
Event Counter 1 Clear: writing a logic 1 to this bit will clear event counter 1
Event Counter 0 Source: this 6 bit value addresses one of the status bits
Event Counter 0 Enable: if this bit is set event counter 0 is enabled
Event Counter 0 Clear: writing a logic 1 to this bit will clear event counter 0
reserved
Event Counter 5 Source: this 6 bit value addresses one of the status bits
Event Counter 5 Enable: if this bit is set the event counter 5 is enabled
Event Counter 5 Clear: writing a logic 1 to this bit will clear event counter 5
Event Counter 4 Source: this 6 bit value addresses one of the status bits
Event Counter 4 Enable: if this bit is set event counter 4 is enabled
Event Counter 4 Clear: writing a logic 1 to this bit will clear event counter 4
Event Counter 3 Source: this 6 bit value addresses one of the status bits
Event Counter 3 Enable: if this bit is set event counter 3 is enabled
Event Counter 3 Clear: writing a logic 1 to this bit will clear event counter 3
number of PCI Parity errors
number of PCI Access errors
every PCI clock cycle with ‘data’ parity error
number of RPS interrupts Task 1
47
EVENTS TO BE COUNTED
DESCRIPTION
DESCRIPTION
DESCRIPTION
Product specification
SAA7146A