MC68HC811E2FN Freescale Semiconductor, MC68HC811E2FN Datasheet - Page 157

MC68HC811E2FN

Manufacturer Part Number
MC68HC811E2FN
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC811E2FN

Cpu Family
HC11
Device Core Size
8b
Frequency (max)
4MHz
Interface Type
SCI/SPI
Program Memory Type
ROMLess
Program Memory Size
Not Required
Total Internal Ram Size
256Byte
# I/os (max)
38
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
52
Package Type
PLCC
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC811E2FN
Manufacturer:
MOT
Quantity:
5 510
Part Number:
MC68HC811E2FN
Manufacturer:
ALLEGRO
Quantity:
5 510
Part Number:
MC68HC811E2FN
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Part Number:
MC68HC811E2FN2
Manufacturer:
FREESCALE
Quantity:
1 238
Part Number:
MC68HC811E2FNE2
Manufacturer:
FREESCALE
Quantity:
1 238
10.10 MC68L11E9/E20 Control Timing
Freescale Semiconductor
Frequency of operation
E-clock period
Crystal frequency
External oscillator frequency
Processor control setup time
Reset input pulse width
Mode programming setup time
Mode programming hold time
Interrupt pulse width, IRQ edge-sensitive mode
Wait recovery startup time
Timer pulse width input capture pulse accumulator input
1. V
2. RESET is recognized during the first clock cycle it is held low. Internal circuitry then drives the pin low for four clock cycles,
t
To guarantee external reset vector
Minimum input time (can be pre-empted by internal reset)
PW
PW
PCSU
otherwise noted
releases the pin, and samples the pin level two cycles later to determine the source of the interrupt. Refer to
Resets and Interrupts
DD
IRQ
TIM
= 3.0 Vdc to 5.5 Vdc, V
Notes
= 1/4 t
= t
= t
1. Rising edge sensitive input
2. Falling edge sensitive input
3. Maximum pulse accumulator clocking rate is E-clock frequency divided by 2.
PA[2:0]
PA[2:0]
CYC
CYC
PA7
PA7
:
CYC
(1) (3)
(2) (3)
+ 20 ns
+ 20 ns
(1)
(2)
+ 75 ns
Characteristic
for further detail.
SS
= 0 Vdc, T
PW
TIM
(1) (2)
M68HC11E Family Data Sheet, Rev. 5.1
A
Figure 10-2. Timer Inputs
= T
L
to T
H
, all timing is shown with respect to 20% V
Symbol
PW
PW
PW
t
f
t
t
PCSU
t
t
XTAL
WRS
4 f
MPS
MPH
CYC
f
RSTL
o
IRQ
TIM
o
1000
1020
1020
Min
325
dc
dc
10
8
1
2
1.0 MHz
MC68L11E9/E20 Control Timing
Max
1.0
4.0
4.0
4
DD
Min
500
200
520
520
dc
dc
10
and 70% V
8
1
2
2.0 MHz
Max
2.0
8.0
8.0
4
DD
Chapter 5
, unless
MHz
MHz
MHz
Unit
t
t
t
CYC
CYC
CYC
ns
ns
ns
ns
ns
157

Related parts for MC68HC811E2FN