MC68HC811E2FN Freescale Semiconductor, MC68HC811E2FN Datasheet - Page 35

• Manufacturer Part Number: MC68HC811E2FN
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC811E2FN

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 256Byte
• # I/os (max): 38
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 52
• Package Type: PLCC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Freescale Semiconductor
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Addr.
Timer Output Compare 1 Register
Timer Output Compare 1 Register
Timer Output Compare 2 Register
Output Compare 1 Data Register
TImer Input Capture 2 Register
Timer Input Capture 1 Register
Timer Input Capture 1 Register
Timer Input Capture 2 Register
Timer Input Capture 3 Register
Timer Input Capture 3 Register
Timer Counter Register High
Timer Counter Register Low
Register Name
Figure 2-7. Register and Control Bit Assignments (Sheet 2 of 6)
See page 136.
See page 137.
See page 137.
See page 132.
See page 132.
See page 132.
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See page 132.
See page 132.
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See page 134.
See page 134.
High (TOC1H)
High (TOC2H)
Low (TOC1L)
High (TIC1H)
High (TIC2H)
High (TIC3H)
Low (TIC1L)
Low (TIC2L)
Low (TIC3L)
(TCNTH)
(TCNTL)
(OC1D)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read: Bit 15
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
M68HC11E Family Data Sheet, Rev. 5.1
I = Indeterminate after reset
OC1D7
Bit 15
Bit 15
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
1
1
1
0
0
0
= Unimplemented
OC1D6
Bit 14
Bit 14
Bit 14
Bit 14
Bit 14
Bit 14
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
1
1
1
6
0
0
0
OC1D5
Bit 13
Bit 13
Bit 13
Bit 13
Bit 13
Bit 13
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
5
0
0
0
1
1
1
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
OC1D4
Bit 12
Bit 12
Bit 12
Bit 12
Bit 12
Bit 12
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
1
1
1
R
4
0
0
0
= Reserved
OC1D3
Bit 11
Bit 11
Bit 11
Bit 11
Bit 11
Bit 11
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
1
1
1
3
0
0
0
Bit 10
Bit 10
Bit 10
Bit 10
Bit 10
Bit 10
U = Unaffected
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
1
1
1
2
0
0
0
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
1
1
1
1
0
0
0
Memory Map
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
0
0
0
1
1
1
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