PSB4860HV4.1 Lantiq, PSB4860HV4.1 Datasheet - Page 168

• Manufacturer Part Number: PSB4860HV4.1
• Manufacturer: Lantiq

Specifications of PSB4860HV4.1

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Data Sheet
0D
CS
PCD
EN
PCM
DD
TS
Note: If PCM=0 then TS denotes the first timeslot of the two consecutive timeslots used.
15
CS
0
h
R
Only even timeslots are allowed in this case.
SDCHN2
0
0
Channel Split
0: Single 16 bit or single 8 bit channel
1: Two adjacent 8 bit channels (SDCHN2:PCM must be set to 0)
PCM Code (for both 8 bit channels if CS=1)
0: A-law
1: µ -law
Enable Interface
0: Interface is disabled
1: Interface is enabled if SDCONF:EN=1
PCM Mode
0: 16 Bit Linear Coding (two timeslots)
1: 8 Bit PCM Coding (one timeslot)
Data Direction
0: DD: Data Downstream, DU: Data Upstream
1: DD: Data Upstream, DU: Data Downstream
Timeslot for Channel 2
...
5
0
0
1
0
0
...
4
0
0
1
0
0
Serial Data Interface Channel 2
...
3
0
0
1
0
0
...
2
0
0
1
0
0
...
1
0
0
1
PCD
0
Reset Value
...
0
0
1
1
EN
0
168
Description
0
1
...
63
PCM
0
DD
0
TS
0
PSB 4860
2000-01-14
0