CS5126-KL Cirrus Logic Inc, CS5126-KL Datasheet - Page 13

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CS5126-KL

Manufacturer Part Number
CS5126-KL
Description
ADC Single SAR 100KSPS 16-Bit Serial 28-Pin PLCC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5126-KL

Package
28PLCC
Resolution
16 Bit
Sampling Rate
100 KSPS
Architecture
SAR
Number Of Adcs
1
Number Of Analog Inputs
2
Digital Interface Type
Serial
Input Type
Voltage
Polarity Of Input Voltage
Bipolar

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ANALOG CIRCUIT CONNECTIONS
Most popular successive-approximation A/D
converters generate dynamic loads at their ana-
log connections. The CS5126 internally buffers
all analog inputs (AIN, VREF, and AGND) to
ease the demands placed on external circuitry.
However, accurate system operation still requires
careful attention to details at the design stage re-
garding source impedances as well as grounding
and decoupling schemes.
Reference Considerations
An application note titled "Voltage references
for the CS501X/CSZ511X Series of A/D Convert-
ers" is available which describes the dynamic
load conditions presented by the VREF input on
Crystal’s self-calibrating SAR A/D converters
(including the CS5126). As the CS5126 se-
quences through bit decisions it switches por-
tions of the capacitor array to the VREF pin in
accordance with the successive-approximation
algorithm. For proper operation, the source im-
pedance at the VREF pin must remain low at
frequencies up to 1MHz.
DS32F1
IN4148
10 k
VA+
a. Simple Reference
100
+
100 F
AGND
Figure 13. Suggested Voltage Reference Circuits
0.1 F
VREF
A large capacitor connected between VREF and
AGND can provide sufficiently low output im-
pedance at the frequencies of interest, so the ref-
erence voltage can simply be derived as shown
in Figure 13a. Although very low cost, this ref-
erence has almost no power supply rejection
from the VA+ line.
ence can be generated using a TL431 shunt ref-
erence from T.I. or Motorola, as shown in Fig-
ure 13b.
The magnitude of the current load on the exter-
nal reference circuitry will scale to the master
clock frequency. At the full-rated 24 MHz clock
the reference must supply a maximum load cur-
rent of 20 A peak-to-peak (2 A typical). An
output impedance of 2
maximum error of 40mV. With a 4.5V reference
and LSB size of 138mV this would insure ap-
proximately 1/4 LSB accuracy. A 10 F capaci-
tor exhibits an impedance of less than 2
quencies greater than 16kHz. A high-quality tan-
talum capacitor in parallel with a smaller ce-
ramic capacitor is recommended.
TL431
Alternatively, a more stable and precise refer-
+12 or +15 V
2 k
b. Low-cost Shunt Reference
0.1 F
50
1.6 k
2 k
will therefore yield a
+
10 F
CS5126
AGND
0.1 F
at fre-
VREF
13

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