CS5126-KL Cirrus Logic Inc, CS5126-KL Datasheet - Page 29

• Manufacturer Part Number: CS5126-KL
• Description: ADC Single SAR 100KSPS 16-Bit Serial 28-Pin PLCC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5126-KL

• Package: 28PLCC
• Resolution: 16 Bit
• Sampling Rate: 100 KSPS
• Architecture: SAR
• Number Of Adcs: 1
• Number Of Analog Inputs: 2
• Digital Interface Type: Serial
• Input Type: Voltage
• Polarity Of Input Voltage: Bipolar

Miscellaneous Hints on Using the Evaluation
Board
Always hit the reset button after powering-up the
board. The CS5126 is self calibrating and require
the reset signal to initiate the calibration proce-
dure.
P4 controls the ADC input mux. This is used to
set the mux to be continuously connected to one
channel, or to be toggling between two channels.
This is very useful for evaluating oversampled
vs. regular sampling digital audio.
P10 controls the Data Ready pulses from the on-
board logic. To cause every data sample to be
read, select option 0. If you wish to read only
every alternate sample, then select option 1 or 2,
depending on whether you wish to read every left
channel value, or every right channel value. This
is useful for evaluating the part with a test system
which does not separate alternate values.
DS32DB5
(GND-Digital Patch)
Figure 8. CDBCAPTURE Header Signal Pattern
Circuit Board
(Top View)
GND
GND
GND
GND
GND
CDBCAPTURE Interface
Figure 8 illustrates the CDBCAPTURE interface
that can be constructed in the digital patch area.
A 2-row, 10 pin stake header is wired as shown.
+5V
+5V
FRAME
SCLK
SDATA
(+5VL - Digital Patch)
(+5VL - Digital Patch)
(SCLK - U9-11)
(DRDY - P8)
(SDATA - U8-14)
CDB5126
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