LPC4310FET100,551 NXP Semiconductors, LPC4310FET100,551 Datasheet - Page 15
LPC4310FET100,551
Manufacturer Part Number
LPC4310FET100,551
Description
IC MCU 32BIT 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC43xxr
Datasheet
1.LPC4310FET100551.pdf
(145 pages)
Specifications of LPC4310FET100,551
Core Processor
ARM® Cortex™-M4/M0
Core Size
32-Bit Dual-Core
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
168K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC4310FET100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC4350_30_20_10
Objective data sheet
Symbol
P1_19
P1_20
P2_0
Pin description
M11
M10
T16
x
x
x
…continued
K9
K10 100 70
G10 108 75
96
68
All information provided in this document is subject to legal disclaimers.
Rev. 2.1 — 23 September 2011
47
48
50
[3]
[3]
[3]
I; PU I
I; PU I/O GPIO0[15] — General purpose digital input/output
I; PU I/O SGPIO4 — General purpose digital input/output pin.
I/O SSP1_SCK — Serial clock for SSP1.
-
-
O
-
O
I/O I2S1_TX_SCK — Receive Clock. It is driven by the
I/O SSP1_SSEL — Slave Select for SSP1.
-
O
I
-
I/O SGPIO13 — General purpose digital input/output pin.
-
O
I/O EMC_A13 — External memory address line 13.
O
I/O GPIO5[0] — General purpose digital input/output pin.
-
I
O
Description
ENET_TX_CLK (ENET_REF_CLK) — Ethernet
Transmit Clock (MII interface) or Ethernet Reference
Clock (RMII interface).
R — Function reserved.
R — Function reserved.
CLKOUT — Clock output pin.
R — Function reserved.
I2S0_RX_MCLK — I2S receive master clock.
master and received by the slave. Corresponds to the
signal SCK in the I
pin.
R — Function reserved.
ENET_TXD1 — Ethernet transmit data 1 (RMII/MII
interface).
T0_CAP2 — Capture input 2 of timer 0.
R — Function reserved.
R — Function reserved.
U0_TXD — Transmitter output for USART0.
USB0_PWR_EN — VBUS drive signal (towards
external charge pump or power management unit);
indicates that Vbus must be driven (active high).
R — Function reserved.
T3_CAP0 — Capture input 0 of timer 3.
ENET_MDC — Ethernet MIIM clock.
32-bit ARM Cortex-M4/M0 microcontroller
Table
LPC4350/30/20/10
2.
2
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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