LPC4310FET100,551 NXP Semiconductors, LPC4310FET100,551 Datasheet - Page 37

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LPC4310FET100,551

Manufacturer Part Number
LPC4310FET100,551
Description
IC MCU 32BIT 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC43xxr
Datasheet

Specifications of LPC4310FET100,551

Core Processor
ARM® Cortex™-M4/M0
Core Size
32-Bit Dual-Core
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
168K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC4310FET100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC4350_30_20_10
Objective data sheet
Symbol
P8_8
P9_0
P9_1
Pin description
L1
T1
N6
x
x
x
…continued
-
-
-
49
59
66
-
-
-
All information provided in this document is subject to legal disclaimers.
Rev. 2.1 — 23 September 2011
-
-
-
[3]
[3]
[3]
I; PU -
I; PU I/O GPIO4[12] — General purpose digital input/output
I; PU I/O GPIO4[13] — General purpose digital input/output
I
-
-
-
-
O
O
O
-
-
-
I
I/O SGPIO0 — General purpose digital input/output pin.
I/O SSP0_SSEL — Slave Select for SSP0.
O
-
-
I/O I2S0_TX_WS — Transmit Word Select. It is driven by
I
I/O SGPIO1 — General purpose digital input/output pin.
I/O SSP0_MISO — Master In Slave Out for SSP0.
Description
R — Function reserved.
USB1_ULPI_CLK — ULPI link CLK signal. 60 MHz
clock generated by the PHY.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
CGU_OUT0 — CGU spare clock output 0.
I2S1_TX_MCLK — I2S1 transmit master clock.
pin.
MCABORT — Motor control PWM, LOW-active fast
abort.
R — Function reserved.
R — Function reserved.
R — Function reserved.
ENET_CRS — Ethernet Carrier Sense (MII
interface).
pin.
MCOA2 — Motor control PWM channel 2, output A.
R — Function reserved.
R — Function reserved.
the master and received by the slave. Corresponds to
the signal WS in the I
ENET_RX_ER — Ethernet receive error (MII
interface).
32-bit ARM Cortex-M4/M0 microcontroller
Table
LPC4350/30/20/10
2.
2
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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