LPC4310FET100,551 NXP Semiconductors, LPC4310FET100,551 Datasheet - Page 9
LPC4310FET100,551
Manufacturer Part Number
LPC4310FET100,551
Description
IC MCU 32BIT 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC43xxr
Datasheet
1.LPC4310FET100551.pdf
(145 pages)
Specifications of LPC4310FET100,551
Core Processor
ARM® Cortex™-M4/M0
Core Size
32-Bit Dual-Core
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
168K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC4310FET100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC4350_30_20_10
Objective data sheet
Symbol
Multiplexed digital pins
P0_0
P0_1
P1_0
Pin description
L3
M2
P2
x
x
x
G2
G1
H1
47
50
54
32
34
38
All information provided in this document is subject to legal disclaimers.
Rev. 2.1 — 23 September 2011
22
23
25
[3]
[3]
[3]
I; PU I/O GPIO0[0] — General purpose digital input/output pin.
I; PU I/O GPIO0[1] — General purpose digital input/output pin.
I; PU I/O GPIO0[4] — General purpose digital input/output pin.
I/O SSP1_MISO — Master In Slave Out for SSP1.
I
I/O SGPIO0 — General purpose digital input/output pin.
-
-
I/O I2S0_TX_WS — Transmit Word Select. It is driven by
I/O I2S1_TX_WS — Transmit Word Select. It is driven by
I/O SSP1_MOSI — Master Out Slave in for SSP1.
I
I/O SGPIO1 — General purpose digital input/output pin.
-
-
I/O I2S1_TX_SDA — I2S1 transmit data. It is driven by
I
I/O EMC_A5 — External memory address line 5.
-
-
I/O SSP0_SSEL — Slave Select for SSP0.
I/O SGPIO7 — General purpose digital input/output pin.
-
Description
ENET_RXD1 — Ethernet receive data 1 (RMII/MII
interface).
R — Function reserved.
R — Function reserved.
the master and received by the slave. Corresponds to
the signal WS in the I
the master and received by the slave. Corresponds to
the signal WS in the I
ENET_COL — Ethernet Collision detect (MII
interface).
R — Function reserved.
R — Function reserved.
ENET_TX_EN — Ethernet transmit enable (RMII/MII
interface).
the transmitter and read by the receiver. Corresponds
to the signal SD in the I
CTIN_3 — SCT input 3. Capture input 1 of timer 1.
R — Function reserved.
R — Function reserved.
R — Function reserved.
32-bit ARM Cortex-M4/M0 microcontroller
Table
LPC4350/30/20/10
2.
2
2
S-bus specification.
S-bus specification.
2
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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