P80C592FFA/00,518 NXP Semiconductors, P80C592FFA/00,518 Datasheet - Page 27
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
P80C592FFA/00,518
Manufacturer Part Number
P80C592FFA/00,518
Description
IC 80C51 MCU 8BIT ROMLESS 68PLCC
Manufacturer
NXP Semiconductors
Series
80Cr
Datasheet
1.P80C592FFA00512.pdf
(108 pages)
Specifications of P80C592FFA/00,518
Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
68-LCC (J-Lead)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
P80C592FFA/00,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
12 SERIAL I/O PORT: SIO0 (UART)
The Serial Port SIO0 is a full duplex (UART) serial I/O port
i.e. it can transmit and receive simultaneously. This Serial
Port is also receive-buffered. It can commence reception
of a second byte before the previously received byte has
been read from the receive register. However, if the first
byte has still not been read by the time reception of the
second byte is complete, one of these (first or second)
bytes will be lost. The SIO0 receive and transmit registers
are both accessed via the S0BUF SFR. Writing to S0BUF
loads the transmit register, and reading S0BUF accesses
to a physically separate receive register. SIO0 can operate
in 4 modes:
Mode 0 Serial data is transmitted and received through
Mode 1 10 bits are transmitted via TXD or received
Mode 2 11 bits are transmitted through TXD or received
Mode 3 11 bits are transmitted through TXD or received
In all four modes, transmission is initiated by any
instruction that writes to the S0BUF SFR.
Reception is initiated in Mode 0 when RI = 0 and REN = 1.
In the other three modes, reception is initiated by the
incoming start bit provided that REN = 1.
Modes 2 and 3 are provided for multiprocessor
communications. In these modes, 9 data bits are received
with the 9
followed by the stop bit. The port can be programmed so
that with receiving the stop bit, the Serial Port interrupt will
be activated if, and only if RB8 = 1.
1996 Jun 27
8-bit microcontroller with on-chip CAN
RXD. TXD outputs the shift clock. 8 data bits are
transmitted/received (LSB first). The baud rate is
fixed at
through RXD: a start bit (0), 8 data bits (LSB first),
and a stop bit (1). On receive, the stop bit is put
into RB8 of the S0CON SFR. The baud rate is
variable.
through RXD: a start bit (0), 8 data bits (LSB first),
a programmable 9
On transmit, the 9
be assigned the value of 0 or 1. With nominal
software, TB8 can be the parity bit (P in PSW).
During a receive, the 9
(S0CON), and the stop bit is ignored. The baud
rate is programmable to either
oscillator frequency.
through RXD: a start bit (0), 8 data bits (LSB first),
a programmable 9
Mode 3 is the same as Mode 2 except for the
baud rate which is variable in Mode 3.
th
bit written to RB8 (S0CON). The 9
1
12
of the oscillator frequency.
th
th
th
data bit (TB8 in S0CON) can
data bit, and a stop bit (1).
data bit, and a stop bit (1).
th
data bit is stored in RB8
1
32
or
th
1
64
bit is
of the
27
This feature is enabled by setting bit SM2 in S0CON. This
feature may be used in multiprocessor systems.
For more information about how to use the UART in
combination with the registers S0CON, PCON, IE, SBUF
and the Timer register, refer to the 8051-based
“8-bit Microcontrollers Data Handbook IC20” .
13 SERIAL I/O PORT: SIO1 (CAN)
SIO1 (CAN) provides the CAN (Controller Area Network)
serial-bus data communication interface. SIO1 (CAN)
replaces the SIO1 (I
microcontroller derivative P8xC552.
13.1
CAN is the definition of a high performance
communication protocol for serial data communication.
The P8xC592 on-chip CAN-controller is a full
implementation of the CAN 2.0A protocol. With the
P8xC592 powerful local networks can be built, both for
automotive and general industrial environments. This
results in a much reduced wiring harness and enhanced
diagnostic and supervisory capabilities.
13.2
Multi-master architecture
Bus access priority determined by the message
identifier
2032 message identifier (2
Guaranteed latency time for high priority messages
Powerful error handling capability
Data length from 0 up to 8 bytes
Multicast and broadcast message facility
Non destructive bit-wise arbitration
Non-return-to-zero (NRZ) coding/decoding with
bit-stuffing
Programmable transfer rate (up to 1 Mbit/s)
Programmable output driver configuration
Suitable for use in a wide range of networks including
the SAE's network classes A, B and C
DMA providing high-speed on-chip data exchange
Bus failure management facility
1
2
AV
On-chip CAN-controller
CAN Features
DD
reference voltage.
2
C) serial interface as provided in the
11
standard frame CAN 2.0A)
Product specification
P8xC592