P80C592FFA/00,518 NXP Semiconductors, P80C592FFA/00,518 Datasheet - Page 60

• Manufacturer Part Number: P80C592FFA/00,518
• Description: IC 80C51 MCU 8BIT ROMLESS 68PLCC
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C592FFA/00,518

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-LCC (J-Lead)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Philips Semiconductors
13.6.7.4
A CAN-controller which detects an error condition,
transmits an Error Flag. Whenever a Bit Error, Stuff Error,
Form Error or an Acknowledgement Error is detected,
transmission of an Error Flag is started at the next bit.
Whenever a CRC Error is detected, transmission of an
Error Flag starts at the bit following the Acknowledge
Delimiter, unless an Error Flag for another error condition
has already started. An Error Flag violates the bit-stuffing
law or corrupts the fixed form bit fields. A violation of the
bit-stuffing law affects any CAN-controller which detects
the error condition. These devices will also transmit an
Error Flag.
An error-passive CAN-controller (see Section 13.6.9)
which detects an error condition, transmits a Passive Error
Flag. A Passive Error Flag is not able to interrupt a current
message at different CAN-controllers but this type of Error
Flag may be ignored (overwritten) by other
CAN-controllers. After having detected an error condition,
an error-passive CAN-controller will wait for six
consecutive bits with identical polarity and when
monitoring them, interpret them as an Error Flag.
After transmission of an Error Flag, each CAN-controller
monitors the bus-line until it detects a transition from a
dominant-to-recessive bit level. At this point in time, every
CAN-controller has finished transmitting its Error Flag and
all CAN-controllers start transmitting seven additional
recessive bits (Error Delimiter, see Section 13.6.4).
The message format of a Data Frame or Remote Frame is
defined in such a way that all detectable errors can be
signalled within the message transmission time and
therefore it is very simple for the CAN-controllers to
associate an Error Frame to the corresponding message
and to initiate retransmission of the corrupted message. If
a CAN-controller monitors any deviation of the fixed form
of an Error Frame, it transmits a new Error Frame.
13.6.7.5
Some CAN-controllers (but not the one on-chip of the
P8xC592) require to delay the transmission of the next
Data Frame or Remote Frame by transmitting one or more
Overload Frames. The transmission of an Overload Frame
must start during the first bit of an expected Intermission
Field. Transmission of Overload Frames which are
reactions on a dominant bit during an expected
Intermission Field, start one bit after this event.
Though the format of Overload Frame and Error Frame are
identical, they are treated differently. Transmission of an
Overload Frame during Intermission Field does not initiate
1996 Jun 27
8-bit microcontroller with on-chip CAN
Error Signalling
Overload Signalling
60
the retransmission of any previous Data Frame or Remote
Frame. If a CAN-controller which transmitted an Overload
Frame monitors any deviation of its fixed form, it transmits
an Error Frame.
13.6.8
The processes described in Sections 13.6.8.1 to 13.6.10.3
are implemented in the P8xC592's on-chip CAN-controller
for error detection.
13.6.8.1
A transmitting CAN-controller monitors the bus on a
bit-by-bit basis. If the bit level monitored is different from
the transmitted one, a Bit Error is signalled.
The exceptions being:
13.6.8.2
The following bit fields are coded using the bit-stuffing
technique:
There are two possible ways of generating a Stuff Error:
During the Arbitration Field, a recessive bit can be
overwritten by a dominant bit. In this case, the
CAN-controller interprets this as a loss of arbitration.
During the Acknowledge Slot, only the receiving
CAN-controllers are able to recognize a Bit Error.
Start-Of-Frame
Arbitration Field
Control Field
Data Field
CRC Sequence.
A disturbance generates more than the allowed five
consecutive bits with identical polarity. These errors are
detected by all CAN-controllers.
A disturbance falsifies one or more of the five bits
preceding the stuff bit. This error situation is not
recognized as a Stuff Error by the receivers. Therefore,
other error detection processes may detect this error
condition such as:
– CRC check, format violation at the receiving
– Bit Error detection by the transmitting CAN-controller.
CAN-controllers, or
E
RROR
Bit Error
Stuff Error
D
ETECTION
Product specification
P8xC592