STEVAL-IPE012V1 STMicroelectronics, STEVAL-IPE012V1 Datasheet - Page 27

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STEVAL-IPE012V1

Manufacturer Part Number
STEVAL-IPE012V1
Description
EVAL BOARD ENERGY METER
Manufacturer
STMicroelectronics
Series
-r

Specifications of STEVAL-IPE012V1

Design Resources
STEVAL-IPE012V1 Schematic STEVAL-IPE012V1 BOM
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
STPM10BTR, STM8L152
Primary Attributes
Single Phase with 1 Current Transformer & Shunt
Secondary Attributes
Tamper Detection
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11462
STPM10
7.16
7.16.1
Figure 21. STPM10 data records map
7.17
DAP
DRP
DSP
DFP
DEV
DMV
CFL
CFH
msb
Programming the STPM10
Data records
The STPM10 has 8 internal data record registers. Every data record consists of a 4-bit
parity code and 28-bit data value where the parity code is computed from the data value,
which makes a total of 32 bits, or 4 bytes.
Figure 21
bit of parity nibble is defined as odd parity of all seven corresponding bits of data nibbles.
The first 6 registers are read-only, except for the 8-bit mode signals in the DFP register (the
mode signals are described later in this paragraph). The last two registers are CFL and
CFH.
Configuration bits
All the configuration bits that control the operation of the device (CFL and CFH data records)
can be written in a temporary way. The configuration bit values are written in the so-called
volatile memory, which are simple latches that hold the configuration data until the power is
on or until a reset condition occurs (both POR and remote reset).
As indicated in the data records table, the configuration bits are 56.
parity
parity
parity
parity
parity
parity
parity
parity
4 bit
1bit
shows the data record structure with the name of the contained information. Each
p
p
uMOM
uRMS
11 bit
Doc ID 17728 Rev 3
type0 active energy
apparent energy
reactive energy
type 1 energy
20 bit
20 bit
upper part of configurators
lower part of configurators
iRMS
iMOM
16 bit
1bit 1bit
0
Theory of operation
1
mode signals
lower f(u)
Status
upper f(u)
8 bit
6 bit
lsb
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