ED DDR3 1G PCF8000 Samsung Semiconductor, ED DDR3 1G PCF8000 Datasheet - Page 15

• Manufacturer Part Number: ED DDR3 1G PCF8000
• Manufacturer: Samsung Semiconductor
• Type: DDR3 SDRAMr

Specifications of ED DDR3 1G PCF8000

• Organization: 64Mx16
• Density: 1Gb
• Address Bus: 16b
• Access Time (max): 20ns
• Maximum Clock Rate: 1.066GHz
• Operating Supply Voltage (typ): 1.5V
• Package Type: FBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Supply Current: 130mA
• Pin Count: 96
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

K4B1G04(08/16)46E
8.2 V
V
Furthermore V
which setup and hold is measured. System timing and voltage budgets need to account for V
data-eye of the input signals.
and voltage effects due to ac-noise on V
The voltage levels for setup and hold time measurements V
"V
The dc-tolerance limits and ac-noise limits for the reference voltages V
This clarifies, that dc-variations of V
This also clarifies that the DRAM setup/hold specification and derating values need to include time and voltage associated with V
REF
V
REF
REF
(t) as a function of time. (V
(DC) is the linear average of V
" shall be understood as V
REF
Tolerances
REF
(t) may temporarily deviate from V
voltage
REF
REF
stands for V
(DC), as defined in Figure 1.
REF
REF
Figure 1. Illustration of V
REF
(t) over a very long period of time (e.g. 1 sec). This average has to meet the min/max requirements in table 7.
affect the absolute voltage a signal has to reach to achieve a valid high or low level and therefore the time to
up to the specified limit (+/-1% of V
REFCA
REF
and V
(DC) by no more than ± 1% V
IH
REFDQ
(AC), V
REF
Page 15 of 61
likewise).
IH
(DC) tolerance and VREF ac-noise limits
(DC), V
REFCA
IL
and V
DD
(AC) and V
) are included in DRAM timings and their associated deratings.
REFDQ
DD
.
IL
are illustrate in Figure 1. It shows a valid reference voltage
(DC) are dependent on V
REF
(DC) deviations from the optimum position within the
1Gb DDR3 SDRAM
V
V
Rev. 1.0 February 2009
SS
DD
REF
time
.
REF
ac-noise. Timing