ED DDR3 1G PCF8000 Samsung Semiconductor, ED DDR3 1G PCF8000 Datasheet - Page 16

• Manufacturer Part Number: ED DDR3 1G PCF8000
• Manufacturer: Samsung Semiconductor
• Type: DDR3 SDRAMr

Specifications of ED DDR3 1G PCF8000

• Organization: 64Mx16
• Density: 1Gb
• Address Bus: 16b
• Access Time (max): 20ns
• Maximum Clock Rate: 1.066GHz
• Operating Supply Voltage (typ): 1.5V
• Package Type: FBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Supply Current: 130mA
• Pin Count: 96
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

K4B1G04(08/16)46E
8.3 AC & DC Logic Input Levels for Differential Signals
8.3.1 Differential signals definition
8.3.2 Differential swing requirement for clock (CK - CK) and strobe (DQS - DQS)
[ Table 9 ] Differential AC & DC Input Levels
Notes:
1. Used to define a differential signal slew-rate.
2. for CK - CK use V
3. These values are not defined, however they single-ended signals CK, CK, DQS, DQS, DQSL, DQSL, DQSU, DQSU need to be within the respective
limits (V
Specification "
[ Table 10 ] Allowed time before ringback (tDVAC) for CLK - CLK and DQS - DQS
reduced ac-high or ac-low level is used for a signal group, then the reduced level applies also here.
V
V
Symbol
IHdiff
ILdiff
V
V
IH
IHdiff
ILdiff
(DC) max, V
(AC)
(AC)
Slew Rate [V/ns]
> 4.0
< 1.0
IH
4.0
3.0
2.0
1.8
1.6
1.4
1.2
1.0
/V
IL
(DC)min) for single-ended signals as well as the limitations for overshoot and undershoot. Refer to "overshoot and Undershoot
IL
differential input high ac
(AC) of ADD/CMD and V
differential input low ac
differential input high
differential input low
Figure 2 : Definition of differential ac-swing and "time above ac level" tDVAC
Parameter
V
V
IL
IH
.DIFF.AC.MAX
.DIFF.AC.MIN
V
V
IL
IH
.DIFF.MAX
.DIFF.MIN
REFCA
0.0
tDVAC [ps] @ |V
; for DQS - DQS, DQSL - DQSL, DQSU - DQSU use V
min
75
57
50
38
34
29
22
13
0
0
2 x (V
Page 16 of 61
half cycle
note 3
IH
note 3
+0.2
min
(AC)-V
IH/Ldiff
tDVAC
DDR3-800/1066/1333/1600
REF
(AC)| = 350mV
)
max
-
-
-
-
-
-
-
-
-
-
2 x (V
tDVAC
REF
note 3
note 3
max
-0.2
- V
tDVAC [ps] @ |V
IL
(AC))
min
175
170
167
163
162
161
159
155
150
150
time
IH
1Gb DDR3 SDRAM
/V
IL
Rev. 1.0 February 2009
(AC) of DQs and V
IH/Ldiff
unit
V
V
V
V
(AC)| = 300mV
REFDQ
max
-
-
-
-
-
-
-
-
-
-
Note
; if a
1
1
2
2