ED DDR3 1G PCF8000 Samsung Semiconductor, ED DDR3 1G PCF8000 Datasheet - Page 20

• Manufacturer Part Number: ED DDR3 1G PCF8000
• Manufacturer: Samsung Semiconductor
• Type: DDR3 SDRAMr

Specifications of ED DDR3 1G PCF8000

• Organization: 64Mx16
• Density: 1Gb
• Address Bus: 16b
• Access Time (max): 20ns
• Maximum Clock Rate: 1.066GHz
• Operating Supply Voltage (typ): 1.5V
• Package Type: FBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Supply Current: 130mA
• Pin Count: 96
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

K4B1G04(08/16)46E
9.4 Differential Output Slew Rate
With the reference load for timing measurements, output slew rate for falling and rising edges is defined and measured between V
V
[ Table 18 ] Differential output slew rate definition
Note : Output slew rate is verified by design and characterization, and may not be subject to production test.
[ Table 19 ] Differential output slew rate
Description : SR : Slew Rate
Q : Query Output (like in DQ, which stands for Data-in, Query-Output
diff : Singe-ended Signals
For Ron = RZQ/7 setting
9.5 Reference Load for AC Timing and Output Slew Rate
Figure 8 represents the effective reference load of 25 ohms used in defining the relevant AC timing parameters of the device as well as output slew rate
measurements.
It is not intended as a precise representation of any particular system environment of a depiction of the actual load presented by a production tester. Sys-
tem designers should use IBIS or other simulation tools to correlate the timing reference load to a system environment. Manufacturers correlate to their
production test conditions, generally one or more coaxial transmission lines terminated at the tester electronics.
Differential output slew rate for rising edge
Differential output slew rate for falling edge
Differential output slew rate
OHdiff
(AC) for differential signals as shown in Table 18 and figure 7.
Parameter
Description
CK/CK
Symbol
SRQse
Figure 8. Reference Load for AC Timing and Output Slew Rate
DUT
Reference
Min
V
Figure 7. Differential Output Slew Rate Definition
5
Point
delta
DDQ
DDR3-800
V
V
TFdiff
DQS
DQS
OHdiff
OLdiff
DQ
From
Max
10
(AC)
(AC)
Measured
Page 20 of 61
Min
V
V
5
DDR3-1066
OHdiff
OLdiff
To
(AC)
delta
(AC)
Max
TRdiff
10
25
V
V
V
Min
OHdiff
TT
OLdiff
5
Ω
DDR3-1333
(AC)
(AC)
V
V
Max
10
OHdiff
OHdiff
1Gb DDR3 SDRAM
V
Delta TRdiff
TT
Defined by
Delta TFdiff
(AC)-V
(AC)-V
Rev. 1.0 February 2009
= V
TBD
Min
OLdiff
OLdiff
DDQ
DDR3-1600
(AC)
(AC)
/2
Max
10
OLdiff
(AC) and
Units
V/ns