SI3063-F-FS Silicon Laboratories Inc, SI3063-F-FS Datasheet - Page 25

• Manufacturer Part Number: SI3063-F-FS
• Description: IC DAA ENH GLOB LINE-SIDE 16SOIC
• Manufacturer: Silicon Laboratories Inc
• Type: Integrated Direct Access Arrangementr

Specifications of SI3063-F-FS

• Package / Case: *
• Function: Direct Access Arrangement (DAA)
• Number Of Circuits: 1
• Current - Supply: 9mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Includes: Billing Tone Detection, Line Voltage Monitor, Loop Current Monitor, Overload Detection, Ring Detector
• Supply Current: 9 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Power (watts): -
• Interface: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

mode is typically used to detect caller ID data and is
enabled by setting the ONHM bit (Register 5, bit 3).
Caller ID data can be gained up or attenuated using the
receive gain control bits in Register 15.
6.24. Caller ID
With the Si306x, caller ID data can be passed from the
phone line to a caller ID decoder connected to the serial
port.
6.24.1. Type I Caller ID
Type I Caller ID sends the CID data while the phone is
on-hook.
In systems where the caller ID data is passed on the
phone line between the first and second rings, utilize the
following method to capture the caller ID data:
1. After identifying a ring signal using one of the
2. Assert the ONHM bit (Register 5, bit 3) to enable
3. Clear the ONHM bit after the caller ID data is
In systems where the caller ID data is preceded by a
line polarity (battery) reversal, use the following method
to capture the caller ID data:
1. Enable full wave rectified ring detection (RFWE,
2. Monitor the RDTP and RDTN register bits to identify
3. Assert the ONHM bit (Register 5, bit 3) to enable
4. Clear the ONHM bit after the caller ID data is
methods described in "6.17. Ring Detection" on
page 22, determine when the first ring is complete.
caller ID data detection. The caller ID data passed
across the RNG 1/2 pins is presented to the host via
the SDO pin.
received.
Register 18, bit 1).
if a polarity reversal or a ring signal has occurred. A
polarity reversal trips either the RDTP or RDTN ring
detection bits, and thus the full-wave ring detector
must be used to distinguish a polarity reversal from a
ring. The lowest specified ring frequency is 15 Hz;
therefore, if a battery reversal occurs, the DSP
should wait a minimum of 40 ms to verify that the
event observed is a battery reversal and not a ring
signal. This time is greater than half the period of the
longest ring signal. If another edge is detected
during this 40 ms pause, this event is characterized
as a ring signal and not a battery reversal.
caller ID data detection. The caller ID data passed
across the RNG 1/2 pins is presented to the data to
the host via the SDO pin.
received.
Rev. 0.9
6.24.2. Type II Caller ID (Si3063 and Si3064 Line-Side
Type II Caller ID sends the CID data while the phone is
off-hook and is often referred to as caller ID/call waiting
(CID/CW). To receive the CID data while off-hook, use
the following procedure (see Figure 8):
1. The Caller Alert Signal (CAS) tone is sent from the
2. The DAA must then check for another parallel device
Central Office (CO) and is digitized along with the
line data. The host processor must detect the
presence of this tone.
on the same line. This is accomplished by briefly
going on-hook, measuring the line voltage, and then
returning to an off-hook state.
a. Set the CALD bit (Register 17, bit 5) to disable
b. Set the RCALD bit (Register 25, bit 5) to disable
c. Set the FOH[1:0] bits (Register 31, bits 6:5) to 11
d. Clear the OH bit to put the DAA in an on-hook
e. Read the LVS bits to determine the state of the
f. Set the OH bit to 1 to return to an off-hook state.
Devices Only)
the calibration that automatically occurs when
going off-hook.
the resistor calibration from occurring when
going off-hook.
to reduce the off-hook counter time to 8 ms.
state. The RXM bit (Register 19, bit 3) may also
be set to mute the receive path.
line.
If the LVS bits read the typical on-hook line
voltage, then no parallel devices are active on
the line and CID data reception can be
continued.
If the LVS bits read well below the typical on-
hook line voltage, then one or more devices are
present and active on the same line that are not
compliant with Type II CID. Do not continue CID
data reception.
After returning to an off-hook state and waiting 8
ms for the off-hook counter, normal data
transmission and reception can proceed. If a
non-compliant parallel device is present, then a
reply tone is not sent by the host tone generator
and the CO does not proceed with sending the
CID data. If all devices on the line are Type II CID
compliant, then the host must mute its upstream
data output to avoid propagation of its reply tone
and the subsequent CID data. After muting its
upstream data output, the host processor should
then return an acknowledgement (ACK) tone to
the CO to request the transmission of the CID
data.
Si306x
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