SI3063-F-FS Silicon Laboratories Inc, SI3063-F-FS Datasheet - Page 7

• Manufacturer Part Number: SI3063-F-FS
• Description: IC DAA ENH GLOB LINE-SIDE 16SOIC
• Manufacturer: Silicon Laboratories Inc
• Type: Integrated Direct Access Arrangementr

Specifications of SI3063-F-FS

• Package / Case: *
• Function: Direct Access Arrangement (DAA)
• Number Of Circuits: 1
• Current - Supply: 9mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Includes: Billing Tone Detection, Line Voltage Monitor, Loop Current Monitor, Overload Detection, Ring Detector
• Supply Current: 9 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Power (watts): -
• Interface: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 4. AC Characteristics
(V
Parameter
Sample Rate
Transmit Frequency Response
Receive Frequency Response
Receive Frequency Response
Transmit Full Scale Level
Receive Full Scale Level
Dynamic Range
Dynamic Range
Dynamic Range
Transmit Total Harmonic Distortion
Transmit Total Harmonic Distortion
Receive Total Harmonic Distortion
Receive Total Harmonic Distortion
Dynamic Range (caller ID mode)
Caller ID Full Scale Level
AOUT Low Level Current
AOUT High Level Current
Notes:
D
1. The 32.768 MHz system-side module supports sample rates up to 16 kHz. The 32.4 MHz system-side module supports
2. Measured at TIP and RING with 600 Ω termination at 1 kHz, as shown in Figure 1.
3. Receive full scale level produces –0.9 dBFS at SDO.
4. DR = 20 x log (RMS V
5. Measurement is 300 to 3400 Hz. Applies to both transmit and receive paths. Vin = 1 kHz, –3 dBFS, Fs = 10300 Hz.
6. THD = 20 x log (RMS distortion/RMS signal). Vin = 1 kHz, –3 dBFS, Fs = 10300 Hz.
7. DR
8. With the enhanced CID circuit (refer to "4. Bill of Materials" on page 10), V
= 3.0 to 3.6 V, T
sample rates up to a maximum of 10.286 MHz.
measurement excludes harmonics. V
application circuit in Figure 2.
CID
= 20 x log (RMS V
4,5
4,5
4,5
A
= 0 to 70 °C for F/K-Grade, see
2,3
2
8
FS
/RMS V
CID
/RMS V
7
6
6
6
6
IN
) + 20 x log (RMS V
Symbol
DR
IN
THD
THD
THD
THD
V
V
V
FS
DR
DR
DR
Fs
) + 20 x log (RMS V
CID
FS
FS
CID
is the 0 dBm full-scale level.
ILIM = 0, DCV = 11, DCR = 0,
ILIM = 0, DCV = 00, DCR = 0,
ILIM = 1, DCV = 11, DCR = 0,
ILIM = 0, DCV = 00, DCR = 0,
ILIM = 0, DCV = 00, DCR = 0,
ILIM = 0, DCV = 11, DCR = 0,
ILIM = 1, DCV = 11, DCR = 0,
"3. Typical Application Schematic" on page 9
VIN = 1 kHz, –13 dBFS
I
I
L
I
I
L
I
I
I
Low –3 dBFS Corner,
Low –3 dBFS Corner,
Low –3 dBFS Corner
L
L
L
L
L
= 120 mA, MINI = 00
= 100 mA, MINI = 00
Rev. 0.9
FULL = 0 (0 dBM)
FULL = 0 (0 dBM)
= 60 mA, MINI = 00
= 50 mA, MINI = 00
= 20 mA, MINI = 11
= 20 mA, MINI = 11
= 20 mA, MINI = 11
Test Condition
IN
/RMS noise). V
FILT = 0
FILT = 1
IN
/RMS noise). V
FS
is the 0 dBm full-scale level. RMS noise
CID
CID
= 1.5 V
is the 1.5 V full-scale level for the typical
Min
7.2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
PEAK
and DR
Typ
200
–72
–78
–78
–78
1.1
1.1
1.6
80
80
80
50
—
—
—
0
5
)
CID
= 62 dB.
Si306x
Max
16
10
10
—
—
—
—
—
—
—
—
—
—
—
—
—
1
V
V
V
Unit
kHz
PEAK
PEAK
PEAK
mA
mA
Hz
Hz
Hz
dB
dB
dB
dB
dB
dB
dB
dB
7