SI3063-F-FS Silicon Laboratories Inc, SI3063-F-FS Datasheet - Page 30

• Manufacturer Part Number: SI3063-F-FS
• Description: IC DAA ENH GLOB LINE-SIDE 16SOIC
• Manufacturer: Silicon Laboratories Inc
• Type: Integrated Direct Access Arrangementr

Specifications of SI3063-F-FS

• Package / Case: *
• Function: Direct Access Arrangement (DAA)
• Number Of Circuits: 1
• Current - Supply: 9mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Includes: Billing Tone Detection, Line Voltage Monitor, Loop Current Monitor, Overload Detection, Ring Detector
• Supply Current: 9 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Power (watts): -
• Interface: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Si306x
Register 2. Control 2
Reset settings = 0000_0011
30
Bit
Name
Type
7
6
5
4
3
2
1
0
Bit
Reserved Returns to zero.
Reserved Returns to zero.
WDTEN
Name
INTE
INTP
HBE
RXE
RDI
INTE
R/W
D7
Interrupt Pin Enable.
0 = The INT port is disabled.
1 = The INT port is enabled.
Interrupt Polarity Select.
0 = The INT port is active low.
1 = The INT port is active high.
Watchdog Timer Enable.
When set, this bit can only be cleared by a hardware reset. The watchdog timer monitors
register accesses. If no register accesses occur within a 4 second window, the DAA is put into
an on-hook state. A write of a DAA register restarts the watchdog timer counter. If the
watchdog timer times out, the OH bit is cleared, placing the DAA into an on-hook state.
Setting the OH bit places the DAA back into an off-hook state.
0 = Watchdog timer disabled.
1 = Watchdog timer enabled.
Ring Detect Interrupt Mode.
This bit operates in conjunction with the RDTM and RDTI bits. This bit is selected if one or two
interrupts are generated for every ring burst.
0 = An interrupt is generated at the beginning of every ring burst.
1 = An interrupt is generated at the beginning and end of every ring burst. The interrupt at the
beginning of the ring burst must be serviced (by writing a 0 to the RDTI bit) before the end of
the ring burst for both interrupts to occur.
Hybrid Enable.
0 = Disconnects hybrid in transmit path.
1 = Connects hybrid in transmit path.
Receive Enable.
0 = Receive path disabled.
1 = Enables receive path.
INTP
R/W
D6
D5
WDTEN
R/W
D4
D3
Rev. 0.9
R/W
RDI
D2
Function
HBE
R/W
D1
RXE
R/W
D0