SI3063-F-FS Silicon Laboratories Inc, SI3063-F-FS Datasheet - Page 31

• Manufacturer Part Number: SI3063-F-FS
• Description: IC DAA ENH GLOB LINE-SIDE 16SOIC
• Manufacturer: Silicon Laboratories Inc
• Type: Integrated Direct Access Arrangementr

Specifications of SI3063-F-FS

• Package / Case: *
• Function: Direct Access Arrangement (DAA)
• Number Of Circuits: 1
• Current - Supply: 9mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Includes: Billing Tone Detection, Line Voltage Monitor, Loop Current Monitor, Overload Detection, Ring Detector
• Supply Current: 9 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Power (watts): -
• Interface: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Register 3. Interrupt Mask
Reset settings = 0000_0000
Bit
Name
Type
7
6
5
4
3
2
1
0
Bit
Reserved Read returns zero.
LCSOM
DODM
ROVM
RDTM
BTDM
POLM
Name
FDTM
RDTM
R/W
D7
Ring Detect Mask.
0 = A ring signal does not cause an interrupt on the INT port.
1 = A ring signal causes an interrupt on the INT port.
Receive Overload Mask.
0 = A receive overload does not cause an interrupt on the INT port.
1 = A receive overload causes an interrupt on the INT port.
Frame Detect Mask.
0 = The communications link achieving frame lock does not cause an interrupt on the INT
port.
1 = The communications link achieving frame lock causes an interrupt on the INT port.
Billing Tone Detect Mask.
0 = A detected billing tone does not cause an interrupt on the INT port.
1 = A detected billing tone causes an interrupt on the INT port.
Drop Out Detect Mask.
0 = A line supply dropout does not cause an interrupt on the INT port.
1 = A line supply dropout causes an interrupt on the INT port.
Loop Current Sense Overload Mask.
0 = An interrupt does not occur when the LCS bits are all 1s.
1 = An interrupt occurs when the LCS bits are all 1s.
Polarity Reversal Detect Mask (Si3062, Si3063, and Si3065 line-side devices only).
Generated from bit 7 of the LVS register. When this bit transitions, it indicates that the polarity
of TIP and RING was switched.
0 = A polarity change on TIP and RING does not cause an interrupt on the INT port.
1 = A polarity change on TIP and RING causes an interrupt on the INT port.
ROVM
R/W
D6
FDTM
R/W
D5
BTDM
R/W
D4
DODM LCSOM
R/W
D3
Rev. 0.9
R/W
D2
Function
D1
POLM
R/W
D0
Si306x
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