AT32UC3C0512CAU Atmel Corporation, AT32UC3C0512CAU Datasheet - Page 336
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AT32UC3C0512CAU
Manufacturer Part Number
AT32UC3C0512CAU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3A0128AU.pdf
(2 pages)
4.AT32UC3C0128C.pdf
(1313 pages)
5.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C0512CAU
Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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Part Number
Manufacturer
Quantity
Price
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128AU PDF datasheet #3
- AT32UC3C0128C PDF datasheet #4
- AT32UC3C0128C PDF datasheet #5
- Current page: 336 of 1313
- Download datasheet (20Mb)
18.6.8.2
Figure 18-31. Clock Rate Transition Occurs while the SMC is Performing a Write Operation
32117C–AVR-08/11
Internal signal from PM
Slow Clock Mode
NBS0, NBS1,
Switching from (to) slow clock mode to (from) normal mode
A[AD_MSB:2]
A0, A1
CLK_SMC
This write cycle finishes with the slow clock mode set
NWE
NCS
of parameters after the clock rate transition
When switching from slow clock mode to the normal mode, the current slow clock mode transfer
is completed at high clock rate, with the set of slow clock mode parameters. See
on page
Figure 18-32 on page 337
mode to the other.
SLOW CLOCK MODE WRITE SLOW CLOCK MODE WRITE
336. The external device may not be fast enough to support such timings.
1
NWECYCLE = 3
1
illustrates the recommended procedure to properly switch from one
1
1
1
Slow clock mode transition is detected:
1
Reload Configuration Wait State
2
NORMAL MODE WRITE
NWECYCLE = 7
3
AT32UC3C
2
Figure 18-31
336
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