AT32UC3C0512CAU Atmel Corporation, AT32UC3C0512CAU Datasheet - Page 931
AT32UC3C0512CAU
Manufacturer Part Number
AT32UC3C0512CAU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3A0128AU.pdf
(2 pages)
4.AT32UC3C0128C.pdf
(1313 pages)
5.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C0512CAU
Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128AU PDF datasheet #3
- AT32UC3C0128C PDF datasheet #4
- AT32UC3C0128C PDF datasheet #5
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- Download datasheet (20Mb)
32.7.2.11
Register Name:
Access Type:
Offset:
Reset Value:
• CTRLDIR: Control Direction
• CURRBK: Current Bank
• NBUSYBK: Number of Busy Banks
32117C–AVR-08/11
31
23
15
7
-
-
-
Writing a zero or a one to this bit has no effect.
This bit is cleared after a SETUP packet to indicate that the following packet is an OUT packet.
This bit is set after a SETUP packet to indicate that the following packet is an IN packet.
This bit is set for non-control endpoints, indicating the current bank:
This field may be updated one clock cycle after the RWALL bit changes, so the user should not poll this field as an interrupt bit.
This field is set to indicate the number of busy banks:
0
0
1
1
0
0
1
1
CURRBK
Endpoint n Status Register
NBUSYBK
CURRBK
STALLEDI/
CRCERRI
30
22
14
6
-
-
UESTAn, n in [0..6]
Read-Only 0x0100
0x0130 + (n * 0x04)
0x00000000
0
1
0
1
0
1
0
1
29
21
13
5
-
-
-
Current Bank
Bank0
Bank1
Reserved
Reserved
Number of Busy Banks
0 (all banks free)
1
2
Reserved
NBUSYBK
NAKINI
28
20
12
4
-
-
RAMACERI
NAKOUTI
27
19
11
3
-
-
ERRORFI
RXSTPI/
26
18
10
2
-
-
-
CTRLDIR
RXOUTI
25
17
9
1
-
DTSEQ
AT32UC3C
TXINI
24
16
8
0
-
-
931
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