AT32UC3C264C Atmel Corporation, AT32UC3C264C Datasheet - Page 476

• Manufacturer Part Number: AT32UC3C264C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C264C

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 20
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

23.7.16
Name:
Access:
Offset:
Reset Value:
• P0-31: Glitch Filter Enable
32117C–AVR-08/11
P31
P23
P15
P7
31
23
15
7
0: Glitch filter is disabled for the corresponding pin.
1: Glitch filter is enabled for the corresponding pin.
NOTE! The value of this register should only be changed when the corresponding bit in IER is zero. Updating GFER while
interrupt on the corresponding pin is enabled can cause an unintentional interrupt to be triggered.
Glitch Filter Enable Register
P30
P22
P14
P6
30
22
14
GFER
Read/Write, Set, Clear, Toggle
0x0C0, 0x0C4, 0x0C8, 0x0CC
-
6
P29
P21
P13
P5
29
21
13
5
P28
P20
P12
P4
28
20
12
4
P27
P19
P11
P3
27
19
11
3
P26
P18
P10
P2
26
18
10
2
P25
P17
P9
P1
25
17
9
1
AT32UC3C
P24
P16
P8
P0
24
16
8
0
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