AT32UC3C264C Atmel Corporation, AT32UC3C264C Datasheet - Page 842

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AT32UC3C264C

Manufacturer Part Number
AT32UC3C264C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C264C

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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31.6.3.5
Figure 31-12. WAVSEL = 3 Without Trigger
32117C–AVR-08/11
Waveform Examples
0xFFFF
WAVSEL = 3
Counter Value
RC
RB
RA
TIOB
TIOA
When CMRn.WAVSEL is three, the value of CVn is incremented from zero to RC. Once RC is
reached, the value of CVn is decremented to zero, then re-incremented to RC and so on. See
Figure 31-12 on page
A trigger such as an external event or a software trigger can modify CVn at any time. If a trigger
occurs while CVn is incrementing, CVn then decrements. If a trigger is received while CVn is
decrementing, CVn then increments. See
RC Compare can stop the counter clock (CMRn.CPCSTOP = 1) and/or disable the counter clock
(CMRn.CPCDIS = 1).
Counter cleared by compare match with RC
842.
Figure 31-13 on page
843.
AT32UC3C
Time
842

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