AT32UC3C264C Atmel Corporation, AT32UC3C264C Datasheet - Page 875

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AT32UC3C264C

Manufacturer Part Number
AT32UC3C264C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C264C

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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32.6.1.5
32.6.1.6
32117C–AVR-08/11
Data management
Pad Suspend
• Host mode
Figure 32-3. Speed Selection in device mode
When the USBC interface is in host mode, internal pull-downs are enabled on both DP and DM.
The interface detects the speed of the connected device and reflects this in the Speed Status
field (USBSTA.SPEED).
Endpoints and pipe buffers can be allocated anywhere in the embedded memory (CPU RAM or
HSB RAM).
See
Figure 32-4
Figure 32-4. Pad Behavior
Figure 32-5
• In Idle state, the pad is in low power consumption mode.
• In Active state, the pad is working.
”RAM management” on page
illustrates the behavior of the USB pad in device mode.
illustrates the pad events leading to a PAD state change.
VBUS
DM
DP
Idle
881.
| DETACH = 1
| Suspend
USBE = 0
& DETACH = 0
& Suspend
USBE = 1
UDCON.DETACH
UDCON.LS
Active
AT32UC3C
875

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