AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 389
AT32UC3L0256
Manufacturer Part Number
AT32UC3L0256
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3L0128.pdf
(85 pages)
4.AT32UC3L0128.pdf
(852 pages)
Specifications of AT32UC3L0256
Flash (kbytes)
256 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
4
Lin
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3L0256-D3HR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT32UC3L0256-H
Manufacturer:
ATMEL
Quantity:
270
Part Number:
AT32UC3L0256-H
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
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- Download datasheet (13Mb)
Figure 19-16. Receiver Behavior when Operating with Hardware Handshaking
Figure 19-17. Transmitter Behavior when Operating with Hardware Handshaking
Figure 19-18.
19.6.4
19.6.4.1
19.6.4.2
32145A–12/2011
RXBUFF
Write
RXD
RTS
CR
SPI Mode
RXEN = 1
Modes of Operation
Baud Rate
The USART features a Serial Peripheral Interface (SPI) link compliant mode, supporting syn-
chronous, full-duplex communication, in both master and slave mode. Writing 0xE (master) or
0xF (slave) to MR.MODE will enable this mode. A SPI in master mode controls the data flow to
and from the other SPI devices, who are in slave mode. It is possible to let devices take turns
being masters (aka multi-master protocol), and one master may shift data simultaneously into
several slaves, but only one slave may respond at a time. A slave is selected when its slave
select (NSS) signal has been raised by the master. The USART can only generate one NSS sig-
nal, and it is possible to use standard I/O lines to address more than one slave.
The SPI system consists of two data lines and two control lines:
Changing SPI mode after initial configuration has to be followed by a transceiver software reset
in order to avoid unpredictable behavior.
The baud rate generator operates as described in
on page
In SPI Master Mode:
• Master Out Slave In (MOSI): This line supplies the data shifted from master to slave. In
• Master In Slave Out (MISO): This line supplies the data shifted from slave to master. In
• Serial Clock (CLK): This is controlled by the master. One period per bit transmission. In both
• Slave Select (NSS): This control line allows the master to select or deselect a slave. In
master mode this is connected to TXD, and in slave mode to RXD.
master mode this is connected to RXD, and in slave mode to TXD.
modes this is connected to CLK.
master mode this is connected to RTS, and in slave mode to CTS.
CTS
TXD
381, with the following requirements:
”Baud Rate in Synchronous and SPI Mode”
AT32UC3L0128/256
RXDIS = 1
389
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