AT89LP3240 Atmel Corporation, AT89LP3240 Datasheet - Page 164

• Manufacturer Part Number: AT89LP3240
• Manufacturer: Atmel Corporation

Specifications of AT89LP3240

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 38
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 4.25
• Eeprom (bytes): 8192
• Self Program Memory: IAP
• Operating Voltage (vcc): 2.4 to 3.6
• Timers: 3
• Isp: SPI/OCD
• Watchdog: Yes

25.7
Table 25-5.
Notes:
164
Address
00 – 01h
02 – 03h
04h
05h
06h
07h
08H
09H
0AH
0BH
User Configuration Fuses
1. The default state for all fuses is FFh.
2. Changes to these fuses will only take effect after a device POR.
3. Changes to these fuses will only take effect after the ISP session terminates by bringing RST high.
AT89LP3240/6440
Fuse Name
Clock Source – CS[0:1]
Start-up Time – SUT[0:1]
Reset Pin Enable
Brown-Out Detector Enable
On-Chip Debug Enable
ISP Enable
User Signature Programming
Tristate Ports
OCD Interface Select
In-Application Programming
User Configuration Fuse Definitions
(3)
The AT89LP3240/6440 includes 11 user fuses for configuration of the device. Each fuse is
accessed at a separate address in the User Fuse Row as listed in
by programming 00h to their locations. Programming FFh to a fuse location will cause that fuse
to maintain its previous state. To set a fuse (set to FFh) the fuse row must be erased and then
reprogrammed using the Fuse Write with Auto-erase command. The default state for all fuses is
FFh.
(3)
(2)
Description
Selects source for the system clock:
CS1
00h
00h
FFh
FFh
Selects time-out delay for the POR/BOD/PWD wake-up period:
SUT1
00h
00h
FFh
FFh
FFh: RST pin functions as reset
00h: RST pin functions as general purpose I/O
FFh: Brown-out Detector Enabled
00h: Brown-out Detector Disabled
FFh: On-Chip Debug Disabled
00h: On-Chip Debug Enabled
FFh: In-System Programming Enabled
00h: In-System Programming Disabled (Enabled at POR only)
FFh: Programming of User Signature Disabled
00h: Programming of User Signature Enabled
FFh: I/O Ports start in input-only mode (tristated) after reset
00h: I/O Ports start in quasi-bidirectional mode after reset
FFh: Fast two-wire interface
00h: Do not use
FFh: In-Application Programming Disabled
00h: In-Application Programming Enabled
CS0
00h
FFh
00h
FFh
SUT0
00h
FFh
00h
FFh
Selected Source
High Speed Crystal Oscillator (XTAL)
Low Speed Crystal Oscillator (XTAL)
External Clock on XTAL1 (XCLK)
Internal RC Oscillator (IRC)
Selected Time-out
1 ms (XTAL); 16 µs (XCLK/IRC)
2 ms (XTAL); 512 µs (XCLK/IRC)
4 ms (XTAL); 1 ms (XCLK/IRC)
16 ms (XTAL); 4 ms (XCLK/IRC)
Table
25-5. Fuses are cleared
3706C–MICRO–2/11