AT89LP3240 Atmel Corporation, AT89LP3240 Datasheet - Page 29

• Manufacturer Part Number: AT89LP3240
• Manufacturer: Atmel Corporation

Specifications of AT89LP3240

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 38
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 4.25
• Eeprom (bytes): 8192
• Self Program Memory: IAP
• Operating Voltage (vcc): 2.4 to 3.6
• Timers: 3
• Isp: SPI/OCD
• Watchdog: Yes

5.2.2.2
5.2.2.3
3706C–MICRO–2/11
Index Disable
Circular Buffers
The MOVC Index Disable bit, MVCD (DSPR.1), disables the indexed addressing mode of the
MOVC A, @A+DPTR instruction. When MVCD = 1, the MOVC instruction functions as
MOVC A, @DPTR with no indexing as shown in
routines that must fetch multiple operands from program memory. DPRB can change the MOVC
destination register from ACC to B, but has no effect on the MOVC index register.
Table 5-7.
The CBE0 and CBE1 bits in DSPR can configure DPTR0 and DPTR1, respectively, to operate in
circular buffer mode. The AT89LP3240/6440 maps circular buffers into two identically sized
regions of EDATA/XDATA. These buffers can speed up convolution computations such as FIR
and IAR digital filters. The length of the buffers are set by the value of the FIRD (E3H) register
for up to 256 entries. Buffer A is mapped from 0000H to FIRD and Buffer B is mapped from
0100H to 100H+FIRD as shown in
When circular buffer mode is enabled, updates to a data pointer referencing the buffer region will
follow circular addressing rules. If the data pointer is equal to FIRD or 100H+FIRD any incre-
ment will cause it to overflow to 0000H or 0100H respectively. If the data pointer is equal to
0000H or 0100H any decrement will cause it to underflow to FIRD or 100H+FIRD respectively.
In this mode, updates can be either an explicit INC DPTR or an automatic update using DPUn
where the DPDn bits control the direction. The data pointer will increment or decrement normally
at any other addresses. Therefore, when circular addressing is in use, the data pointers can still
operate as regular pointers in the FIRD+1 to 00FFH and greater than 100H+FIRD ranges.
Figure 5-6.
MVCD
0
0
1
1
DPRB
MOVC @DPTR Operating Modes
Circular Buffer Mode
0
1
0
1
A, @A+DPTR0
A, @A+DPTR0
A, @DPTR0
A, @DPTR0
MOVC
MOVC
MOVC
MOVC
DPTR
DPTR
DPTR
DPS = 0
Figure
Equivalent Operation for MOVC A, @A+DPTR
0100h
0000h
A, @A+DPTR1
B, @A+DPTR1
A, @DPTR1
B, @DPTR1
5-6. Both data pointers may operate in either buffer.
/DPTR
100h + FIRD
MOVC
MOVC
MOVC
MOVC
FIRD
Table
B
A
5-7. MVCD can improve the efficiency of
A, @A+DPTR1
B, @A+DPTR1
A, @DPTR1
B, @DPTR1
AT89LP3240/6440
MOVC
MOVC
MOVC
MOVC
DPTR
DPS = 1
A, @A+DPTR0
A, @A+DPTR0
A, @DPTR0
A, @DPTR0
/DPTR
MOVC
MOVC
MOVC
MOVC
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