AT89LP3240 Atmel Corporation, AT89LP3240 Datasheet - Page 62

• Manufacturer Part Number: AT89LP3240
• Manufacturer: Atmel Corporation

Specifications of AT89LP3240

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 38
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 4.25
• Eeprom (bytes): 8192
• Self Program Memory: IAP
• Operating Voltage (vcc): 2.4 to 3.6
• Timers: 3
• Isp: SPI/OCD
• Watchdog: Yes

12.2
62
Symbol
PHS [2-0]
T2CM
[1-0]
T2OE
DCEN
Capture Mode
AT89LP3240/6440
Function
CCA Phase Mode. PWM channels may be grouped by 2, 3 or 4 such that only one channel in a group produces a pulse
in any one period. The PHS[2-0] bits may only be written when the timer is not active, i.e. TR2 = 0.
PHS2
0
0
0
0
1
1
1
1
Timer 2 Count Mode.
T2CM1
0
0
1
1
Timer 2 Output Enable. When T2OE = 1 and C/T2 = 0, the T2 pin will toggle after every Timer 2 overflow.
Timer 2 Down Count Enable. When Timer 2 operates in Auto-Reload mode and EXEN2 = 1, setting DCEN = 1 will cause
Timer 2 to count up or down depending on the state of T2EX.
PHS1
0
0
1
1
0
0
1
1
T2CM0
0
1
0
1
In the Capture mode, Timer 2 is a fixed 16-bit timer or counter that counts up from MIN to MAX.
An overflow from MAX to MIN sets bit TF2 in T2CON. If EXEN2 = 1, a 1-to-0 transition at exter-
nal input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and
RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set.
The EXF2 and TF2 bits can generate an interrupt. Capture mode is illustrated in
The Timer 2 overflow rate in Capture mode is given by the following equation:
PHS0
0
1
0
1
0
1
0
1
Count Mode
Standard Timer 2 (up count:
Clear on RCAP compare (up count:
Dual-slope with single update (up-down count:
Dual-slope with double update (up-down count:
Capture Mode:
Phase Mode
Disabled, all channels active
2-phase output on channels A & B
3-phase output on channels A, B & C
4-phase output on channels A, B, C & D
Dual 2-phase output on channels A & B and C & D
reserved
reserved
reserved
Time-out Period
BOTTOM
MIN
→
→
MAX
TOP
=
)
------------------------------------------------------ -
Oscillator Frequency
MIN
)
MIN
→
→
TOP
TOP
65536
→
→
MIN
MIN
)
)
×
(
TPS
+
3706C–MICRO–2/11
1
Figure
)
12-1.