AT89LP3240 Atmel Corporation, AT89LP3240 Datasheet - Page 22

• Manufacturer Part Number: AT89LP3240
• Manufacturer: Atmel Corporation

Specifications of AT89LP3240

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 38
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 4.25
• Eeprom (bytes): 8192
• Self Program Memory: IAP
• Operating Voltage (vcc): 2.4 to 3.6
• Timers: 3
• Isp: SPI/OCD
• Watchdog: Yes

4. Special Function Registers
Table 4-1.
Notes:
22
0D8H
0D0H
0C8H
0C0H
0E8H
0E0H
0B8H
0B0H
0A8H
0A0H
0F8H
0F0H
98H
90H
88H
80H
1. All SFRs in the left-most column are bit-addressable.
2. Reset value is 1111 1111B when Tristate-Port Fuse is enabled and 0000 0000B when disabled.
AT89LP3240/6440
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
1111 1111
0000 0000
1111 1111
0000 0000
1111 1111
0000 0000
000x x000
xx11 1111
T2CON
SCON
TCON
SPSR
PSW
ACC
P4
P3
P2
P1
IP
IE
B
8
0
AT89LP3240/6440 SFR Map and Reset Values
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0010 0100
0000 0000
0000 0111
xxxx xxxx
T2MOD
SADEN
SADDR
TCONB
T2CCA
TMOD
SPCR
DADC
SBUF
A map of the on-chip memory area called the Special Function Register (SFR) space is shown in
Table
Note that not all of the addresses are occupied, and unoccupied addresses may not be imple-
mented on the chip. Read accesses to these addresses will in general return random data, and
write accesses will have an indeterminate effect. User software should not write to these unlisted
locations, since they may be used in future products to invoke new features.
AX
SP
9
1
4-1. See also
0000 0000
0000 0000
0000 0000
1111 1111
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 00x0
xxxx xxxx
0000 000
RCAP2L
GPMOD
P1M0
T2CCL
TWCR
SPDR
DSPR
DPCF
P0M0
DP0L
DADI
RL0
TL0
A
2
(2)
“Register Index” on page
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
RCAP2H
T2CCH
TWSR
P1M1
P0M1
GPLS
DP0H
FIRD
RL1
TL1
B
3
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
xxxx x000
0000 000
P2M0
T2CCC
GPIEN
TWAR
MACL
DADL
DP1L
RH0
TH0
TL2
IE2
C
4
(2)
153.
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
xxxx x000
T2CCF
TWDR
MACH
DADH
P2M1
DP1H
GPIF
RH1
TH2
TH1
IP2
D
5
(write-only)
0000 0000
0000 0000
0000 0000
MEMCON
0000 00xx
xxxx x000
xxxx 0000
WDTRST
P3M0
P4M0
TWBR
AUXR
PAGE
IP2H
SPX
E
6
(2)
(2)
0000 0000
0000 0000
xx00 0000
0000 0000
0000 0000
0000 x000
1100 0000
0000 0000
0000 x000
0000 0000
WDTCON
CLKREG
ACSRB
ACSRA
PCON
P3M1
P4M1
AREF
IPH
BX
F
7
3706C–MICRO–2/11
0FFH
0F7H
0EFH
0E7H
0DFH
0D7H
0CFH
0C7H
0BFH
0B7H
0AFH
0A7H
9FH
97H
8FH
87H