AT89LP51ED2 Atmel Corporation, AT89LP51ED2 Datasheet - Page 195

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AT89LP51ED2

Manufacturer Part Number
AT89LP51ED2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89LP51ED2

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
42
Spi
1
Twi (i2c)
1
Uart
1
Adc Channels
7
Adc Resolution (bits)
10
Adc Speed (ksps)
153.8
Sram (kbytes)
2.25
Eeprom (bytes)
4096
Self Program Memory
API
Operating Voltage (vcc)
2.4 to 5.5
Timers
4
Isp
SPI/OCD/UART
Watchdog
Yes

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24.4.2.2
24.4.2.3
24.4.2.4
3714A–MICRO–7/11
Launching Programming
Status of the Flash Memory
Loading the Page Buffer
Table 24-8.
The FPL bits in the FCON register are used to secure the launch of programming. A specific
sequence must be written in these bits to unlock the write protection and to launch the program-
ming. This sequence is 5xH followed by AxH.
memory spaces according to the FMOD bits.
Table 24-9.
Notes:
The bit FBUSY in FCON register is used to indicate the status of programming. FBUSY is set
when programming is in progress and cleared when the programming completes. If program-
ming was interrupted due to a brown-out condition the ERR flag in EECON is set.
The AT89LP51RD2/ED2/ID2 includes a temporary page buffer of 64 bytes, or one half of a
page. Because the page buffer is 64 bytes long, the maximum number of bytes written at one
time is 64. Therefore, two write cycles are required to fill an entire 128-byte page, one for the low
half page (00H–3FH) and one for the high half page (40H–7FH) as shown in
User Application
User Signature
User Fuses
Reserved
Memory
FMOD1
(CODE)
1. The sequence 5xH and AxH must be executing without instructions between them otherwise
2. Interrupts that may occur during programming time must be disabled to avoid any spurious exit
0
0
1
1
the programming is aborted.
of the programming mode.
Memory Selection
Programming Sequences
FPL
A
A
A
A
5
5
5
5
3-0
FMOD0
AT89LP51RD2/ED2/ID2 Preliminary
0
1
0
1
FPS
Write to FCON
X
X
X
X
X
X
X
X
Addressable space
User Application (0000–FFFFH)
User Signature (0000–01FFH)
Atmel Signature (0200–027FH read-only)
User Fuses (0000–007FH)
Hardware Security Bits (0080–00FFH read-only)
Reserved
FMOD1
0
0
0
0
1
1
1
1
Table 24-9
FMOD0
0
0
1
1
0
0
1
1
summarizes the programming of the
Operation
No action
Write the page buffer to user space
(0000–FFFFH)
No action
Write the page buffer to User
Signature space (0000–01FFH)
No action
Write the page buffer to User Fuse
space (0000–007FH)
No action
No action
Figure
24-2.
195

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