AT89LP51ID2 Atmel Corporation, AT89LP51ID2 Datasheet - Page 202

• Manufacturer Part Number: AT89LP51ID2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51ID2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 2.25
• Eeprom (bytes): 4096
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

Figure 24-7. Bootloader Functional Description
24.5.1
202
AT89LP51RD2/ED2/ID2 Preliminary
Bootloader Process
Specific Protocol
External Host with
Communication
The bootloader can be activated by two means: Hardware conditions or regular boot process.
The Hardware condition PSEN = 0 during the deassertion of RST (falling edge for POL = 1, ris-
ing edge for POL = 0) forces the on-chip bootloader execution. This allows an application to be
built that will normally execute the end user’s code but can be manually forced into default Boot-
loader operation. As PSEN is a an output port in normal operating mode after reset, user
application should take care to release PSEN after the validating edge of the reset signal. The
hardware condition is sampled at the reset edge, and thus can be released at any time when the
reset input is inactive. To ensure correct microcontroller startup, the PSEN pin should not be tied
to ground during power-on (See
Figure 24-8. Hardware condition typical sequence during power-on (POL = 1)
ISP Communication
VCC
PSEN
RST
Management
Flash Memory
Management
Figure
Memory
Flash
24-8).
Management (API)
User Call
Application
User
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