AT90PWM1 Atmel Corporation, AT90PWM1 Datasheet - Page 48
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AT90PWM1
Manufacturer Part Number
AT90PWM1
Description
Manufacturer
Atmel Corporation
Specifications of AT90PWM1
Flash (kbytes)
8 Kbytes
Pin Count
24
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
19
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
1
Pwm Channels
7
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM1-16SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT90PWM161-16MN
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT90PWM161-WN
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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9.2
48
Watchdog Timer
AT90PWM1
AT90PWM1 has an Enhanced Watchdog Timer (WDT). The main features are:
•
•
•
•
Figure 9-7.
The Watchdog Timer (WDT) is a timer counting cycles of a separate on-chip 128 kHz oscillator.
The WDT gives an interrupt or a system reset when the counter reaches a given time-out value.
In normal operation mode, it is required that the system uses the WDR - Watchdog Timer Reset
- instruction to restart the counter before the time-out value is reached. If the system doesn't
restart the counter, an interrupt or system reset will be issued.
In Interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can be used
to wake the device from sleep-modes, and also as a general system timer. One example is to
limit the maximum time allowed for certain operations, giving an interrupt when the operation
has run longer than expected. In System Reset mode, the WDT gives a reset when the timer
expires. This is typically used to prevent system hang-up in case of runaway code. The third
mode, Interrupt and System Reset mode, combines the other two modes by first giving an inter-
rupt and then switch to System Reset mode. This mode will for instance allow a safe shutdown
by saving critical parameters before a system reset.
The “Watchdog Timer Always On” (WDTON) fuse, if programmed, will force the Watchdog Timer
to System Reset mode. With the fuse programmed the System Reset mode bit (WDE) and Inter-
rupt mode bit (WDIE) are locked to 1 and 0 respectively. To further ensure program security,
alterations to the Watchdog set-up must follow timed sequences. The sequence for clearing
WDE and changing time-out configuration is as follows:
1. In the same operation, write a logic one to the Watchdog change enable bit (WDCE) and
2. Within the next four clock cycles, write the WDE and Watchdog prescaler bits (WDP) as
Clocked from separate On-chip Oscillator
3 Operating modes
Selectable Time-out period from 16ms to 8s
Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode
– Interrupt
– System Reset
– Interrupt and System Reset
WDE. A logic one must be written to WDE regardless of the previous value of the WDE
bit.
desired, but with the WDCE bit cleared. This must be done in one operation.
Watchdog Timer
OSCILLATOR
128 KHz
WDP3
WDIF
WDIE
INTERRUPT
MCU RESET
4378C–AVR–09/08
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