AT90PWM2B Atmel Corporation, AT90PWM2B Datasheet - Page 217
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AT90PWM2B
Manufacturer Part Number
AT90PWM2B
Description
Manufacturer
Atmel Corporation
Specifications of AT90PWM2B
Flash (kbytes)
8 Kbytes
Pin Count
24
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
19
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
1
Pwm Channels
7
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM2B-16SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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19.4
19.4.1
19.4.2
19.4.3
4317J–AVR–08/10
Configuring the EUSART
Data Transmission – EUSART Transmitter
Sending Frames with 5 to 8 Data Bit
Sending Frames with 9, 13, 14, 15 or 16 Data Bit
The EUSART Transmitter is enabled in the same way as standard USART, by setting the Trans-
mit Enable (TXEN) bit in the UCSRB Register. When the Transmitter is enabled, the normal port
operation of the TxDn pin is overridden by the EUSART and given the function as the Transmit-
ter’s serial output. The baud rate, mode of operation and frame format must be set up once
before doing any transmissions. If synchronous operation is used, the clock on the XCK pin will
be overridden and used as transmission clock.
In this mode the behavior is the same as the standard USART (See “Sending Frames with 5 to 8
Data Bit” in USART section).
In these configurations the most significant bits (9, 13, 14, 15 or 16) should be loaded in the
EUDR register before the low byte of the character is written to UDR. The write operation in the
UDR register allows to start the transmission.
Note:
Assembly Code Example
C Code Example
TABLE 2.
EUSART_Transmit:
void EUSART_Transmit( unsigned int data )
{
}
; Wait for empty transmit buffer
sbis UCSRA,UDRE
rjmp EUSART_Transmit
; Put LSB data (r16) and MSN data (r15) into buffer, sends the data
sts
sts
ret
/* Wait for empty transmit buffer */
while ( !( UCSRA & (1<<UDRE))) )
/* Put data into buffer, sends the data */
EUDR = data>>8;
UDR = data;
The example code assumes that the part specific header file is included.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically “LDS”
and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
EUDR,r15
UDR,r16
(1)
(1)
AT90PWM2/3/2B/3B
217
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