AT90PWM2B Atmel Corporation, AT90PWM2B Datasheet - Page 42

• Manufacturer Part Number: AT90PWM2B
• Manufacturer: Atmel Corporation

Specifications of AT90PWM2B

• Flash (kbytes): 8 Kbytes
• Pin Count: 24
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 19
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 105
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 12
• Input Capture Channels: 1
• Pwm Channels: 7
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

8.6
8.6.1
42
Power Reduction Register
AT90PWM2/3/2B/3B
Power Reduction Register - PRR
with the exception that the Oscillator is kept running. From Standby mode, the device wakes up
in six clock cycles.
Table 8-2.
Notes:
The Power Reduction Register, PRR, provides a method to stop the clock to individual peripher-
als to reduce power consumption. The current state of the peripheral is frozen and the I/O
registers can not be read or written. Resources used by the peripheral when stopping the clock
will remain occupied, hence the peripheral should in most cases be disabled before stopping the
clock. Waking up a module, which is done by clearing the bit in PRR, puts the module in the
same state as before shutdown.
A full predictible behaviour of a peripheral is not guaranteed during and after a cycle of stopping
and starting of its clock. So its recommended to stop a peripheral before stopping its clock with
PRR register.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall
power consumption. In all other sleep modes, the clock is already stopped.
Note:
• Bit 7 - PRPSC2: Power Reduction PSC2
Writing a logic one to this bit reduces the consumption of the PSC2 by stopping the clock to this
module. When waking up the PSC2 again, the PSC2 should be re initialized to ensure proper
operation.
Bit
Read/Write
Initial Value
Sleep
Mode
Idle
ADC
Noise
Reduction
Power-
down
Standby
1. Only recommended with external crystal or resonator selected as clock source.
2. Only level interrupt.
PRPSC1 is not used on AT90PWM2/2B
(1)
PRPSC2
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
R/W
7
0
Active Clock Domains
PRPSC1
Note:)
R/W
6
0
X
(
PRPSC0
X
X
R/W
5
0
X
X
PRTIM1
R/W
4
0
Oscillator
X
X
X
s
PRTIM0
R/W
3
0
X
X
X
X
(2)
(2)
(2)
PRSPI
R/W
2
0
X
X
X
Wake-up Sources
PRUSART
R/W
1
0
X
X
PRADC
X
X
R/W
4317J–AVR–08/10
0
0
X
X
X
X
PRR
X