ATmega32C1 Automotive Atmel Corporation, ATmega32C1 Automotive Datasheet - Page 225

• Manufacturer Part Number: ATmega32C1 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega32C1 Automotive

• Flash (kbytes): 32 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 27
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Can: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

17.6.3
7647G–AVR–09/11
LIN Enable Interrupt Register - LINENIR
• Bit 3 - LERR: Error Interrupt
• Bit 2 - LIDOK: Identifier Interrupt
• Bit 1 - LTXOK: Transmit Performed Interrupt
• Bit 0 - LRXOK: Receive Performed Interrupt
• Bits 7:4 - Reserved Bits
• Bit 3 - LENERR: Enable Error Interrupt
Bit
Read/Write
Initial Value
enable bit - LENERR - is set in LINENIR.
resets all LINERR bits.
LINENIR.
LINENIR.
be written to zero when LINENIR is written.
– 0 = No error,
– 1 = An error has occurred.
– 0 = No identifier,
– 1 = Slave task: Identifier present, master task: Tx Header complete.
– 0 = No Tx,
– 1 = Tx Response complete.
– 0 = No Rx
– 1 = Rx Response complete.
– 0 = Error interrupt masked,
It is a logical OR of LINERR register bits. This bit generates an interrupt if its respective
The user clears this bit by writing 1 in order to reset this interrupt. Resetting LERR also
In UART mode, this bit is also cleared by reading LINDAT.
This bit generates an interrupt if its respective enable bit - LENIDOK - is set in LINENIR.
The user clears this bit by writing 1, in order to reset this interrupt.
This bit generates an interrupt if its respective enable bit - LENTXOK - is set in
The user clears this bit by writing 1, in order to reset this interrupt.
In UART mode, this bit is also cleared by writing LINDAT.
This bit generates an interrupt if its respective enable bit - LENRXOK - is set in
The user clears this bit by writing 1, in order to reset this interrupt.
In UART mode, this bit is also cleared by reading LINDAT.
These bits are reserved for future use. For compatibility with future devices, they must
R
7
0
-
R
6
0
-
R
5
0
-
Atmel ATmega16/32/64/M1/C1
R
4
0
-
LENERR
R/W
3
0
LENIDOK
R/W
2
0
LENTXOK
R/W
1
0
LENRXOK
R/W
0
0
LINENIR
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