ATmega32C1 Automotive Atmel Corporation, ATmega32C1 Automotive Datasheet - Page 50
ATmega32C1 Automotive
Manufacturer Part Number
ATmega32C1 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA16M1_AUTOMOTIVE.pdf
(12 pages)
3.ATMEGA16M1_AUTOMOTIVE.pdf
(25 pages)
4.ATMEGA16M1_AUTOMOTIVE.pdf
(367 pages)
Specifications of ATmega32C1 Automotive
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #2
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #3
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #4
- Current page: 50 of 367
- Download datasheet (7Mb)
7.2.4
7.2.5
50
Atmel ATmega16/32/64/M1/C1
Watchdog Reset
MCU Status Register – MCUSR
Figure 7-5.
When the Watchdog times out, it will generate a short reset pulse of one CK cycle duration.
On the falling edge of this pulse, the delay timer starts counting the Time-out period t
Refer to
Figure 7-6.
The MCU Status Register provides information on which reset source caused an MCU reset.
• Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by writing
a logic zero to the flag.
• Bit 2 – BORF: Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by writing
a logic zero to the flag.
Bit
Read/Write
Initial Value
page 52
CC
Brown-out Reset During Operation
Watchdog Reset During Operation
INTERNAL
TIME-OUT
R
for details on operation of the Watchdog Timer.
7
–
0
RESET
RESET
V
CC
R
6
–
0
R
5
–
0
V
CK
BOT-
R
4
–
0
WDRF
R/W
3
BORF
R/W
2
V
t
See Bit Description
TOUT
BOT+
EXTRF
R/W
1
PORF
R/W
7647G–AVR–09/11
0
MCUSR
TOUT
.
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