ATmega32C1 Automotive Atmel Corporation, ATmega32C1 Automotive Datasheet - Page 245
ATmega32C1 Automotive
Manufacturer Part Number
ATmega32C1 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA16M1_AUTOMOTIVE.pdf
(12 pages)
3.ATMEGA16M1_AUTOMOTIVE.pdf
(25 pages)
4.ATMEGA16M1_AUTOMOTIVE.pdf
(367 pages)
Specifications of ATmega32C1 Automotive
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #2
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #3
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #4
- Current page: 245 of 367
- Download datasheet (7Mb)
18.9
18.9.1
7647G–AVR–09/11
ADC Register Description
ADC Multiplexer Register – ADMUX
The ADC of the ATmega16/32/64/M1/C1 is controlled through 3 different registers. The ADC-
SRA and The ADCSRB registers which are the ADC Control and Status registers, and the
ADMUX which allows to select the Vref source and the channel to be converted.
The conversion result is stored on ADCH and ADCL register which contain respectively the
most significant bits and the less significant bits.
Bit
Read/Write
Initial Value
• Bit 7, 6 – REFS1, 0: ADC Vref Selection Bits
These 2 bits determine the voltage reference for the ADC.
The different setting are shown in
Table 18-4.
If bits REFS1 and REFS0 are changed during a conversion, the change will not take effect
until this conversion is complete (it means while the ADIF bit in ADCSRA register is set).
In case the internal Vref is selected, it is turned ON as soon as an analog feature needed it is
set.
• Bit 5 – ADLAR: ADC Left Adjust Result
Set this bit to left adjust the ADC result.
Clear it to right adjust the ADC result.
The ADLAR bit affects the configuration of the ADC result data registers. Changing this bit
affects the ADC data registers immediately regardless of any on going conversion. For a com-
plete description of this bit, see Section “ADC Result Data Registers – ADCH and ADCL”,
page 249.
AREFE
N
1
1
0
1
1
0
ISRCEN
0
0
0
0
0
x
ADC Voltage Reference Selection
REFS1
R/W
7
0
REFS1
0
0
0
1
1
1
REFS0
R/W
6
0
ADLAR
REFS0
0
1
1
0
1
1
R/W
Table
5
0
Atmel ATmega16/32/64/M1/C1
18-4.
MUX4
Description
External Vref on AREF pin, Internal Vref is switched off
AVcc with external capacitor connected on the AREF
pin
AVcc (no external capacitor connected on the AREF
pin)
Reserved
Internal 2.56V Reference voltage with external
capacitor connected on the AREF pin
Internal 2.56V Reference voltage
4
0
-
MUX3
R/W
3
0
MUX2
R/W
2
0
MUX1
R/W
1
0
MUX0
R/W
0
0
ADMUX
245
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