ATmega32U4 Atmel Corporation, ATmega32U4 Datasheet - Page 131

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ATmega32U4

Manufacturer Part Number
ATmega32U4
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega32U4

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
14
Hardware Qtouch Acquisition
No
Max I/o Pins
26
Ext Interrupts
13
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
3.3
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
2
Pwm Channels
8
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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Table 14-5.
7766F–AVR–11/10
Mode
10
11
12
0
1
2
3
4
5
6
7
8
9
WGMn3
0
0
0
0
0
0
0
0
1
1
1
1
1
Waveform Generation Mode Bit Description
WGMn2
(CTCn)
0
0
0
0
1
1
1
1
0
0
0
0
1
Table 14-4.
Note:
• Bit 1:0 – WGMn1:0: Waveform Generation Mode
Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode, and three types
of Pulse Width Modulation (PWM) modes.
COMnA1/COMnB/
(PWMn1)
WGMn1
COMnC1
0
0
1
1
0
0
1
1
0
0
1
1
0
A special case occurs when OCRnA/OCRnB/OCRnC equals TOP and
COMnA1/COMnB1//COMnC1 is set.
details.
0
0
1
1
Compare Output Mode, Phase Correct and Phase and Frequency Correct PWM
(PWMn0)
WGMn0
0
1
0
1
0
1
0
1
0
1
0
1
0
COMnA0/COMnB0/
Timer/Counter Mode of Operation
Normal
PWM, Phase Correct, 8-bit
PWM, Phase Correct, 9-bit
PWM, Phase Correct, 10-bit
CTC
Fast PWM, 8-bit
Fast PWM, 9-bit
Fast PWM, 10-bit
PWM, Phase and Frequency Correct
PWM, Phase and Frequency Correct
PWM, Phase Correct
PWM, Phase Correct
CTC
COMnC0
Table
(1)
0
1
0
1
14-5. Modes of operation supported by the Timer/Counter
See “Phase Correct PWM Mode” on page 99.
(See “Modes of Operation” on page
Description
Normal port operation, OCnA/OCnB/OCnC
disconnected.
WGM13:0 = 8, 9 10 or 11: Toggle OC1A on
Compare Match, OC1B and OC1C
disconnected (normal port operation). For all
other WGM1 settings, normal port operation,
OC1A/OC1B/OC1C disconnected.
Clear OCnA/OCnB/OCnC on compare
match when up-counting. Set
OCnA/OCnB/OCnC on compare match
when downcounting.
Set OCnA/OCnB/OCnC on compare match
when up-counting. Clear
OCnA/OCnB/OCnC on compare match
when downcounting.
TOP
0xFFFF
0x00FF
0x01FF
0x03FF
OCRnA
0x00FF
0x01FF
0x03FF
ICRn
OCRnA
ICRn
OCRnA
ICRn
ATmega16/32U4
Update of
OCRn
Immediate
TOP
TOP
TOP
Immediate
TOP
TOP
TOP
BOTTOM
BOTTOM
TOP
TOP
Immediate
96.).
x
at
for more
TOVn Flag
Set on
MAX
BOTTOM
BOTTOM
BOTTOM
MAX
TOP
TOP
TOP
BOTTOM
BOTTOM
BOTTOM
BOTTOM
MAX
131

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