ATmega32U4 Atmel Corporation, ATmega32U4 Datasheet - Page 27

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ATmega32U4

Manufacturer Part Number
ATmega32U4
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega32U4

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
14
Hardware Qtouch Acquisition
No
Max I/o Pins
26
Ext Interrupts
13
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
3.3
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
2
Pwm Channels
8
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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6. System Clock and Clock Options
6.1
6.1.1
6.1.2
6.1.3
7766F–AVR–11/10
Clock Systems and their Distribution
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
I/O
Figure 6-1
need not be active at a given time. In order to reduce power consumption, the clocks to modules
not being used can be halted by using different sleep modes, as described in
ment and Sleep Modes” on page
Figure 6-1.
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and USART.
The I/O clock is also used by the External Interrupt module, but note that some external inter-
rupts are detected by asynchronous logic, allowing such interrupts to be detected even if the I/O
clock is halted. Also, TWI address recognition is handled in all sleep modes.
The Flash clock controls operation of the Flash interface. The Flash clock is usually active simul-
taneously with the CPU clock.
CPU
FLASH
USB
(1)
presents the principal clock systems in the AVR and their distribution. All of the clocks
PLL Postcaler
Multiplexer
PLL Input
PLL
Clock Distribution
clk
PLL
High Speed
(2)
Timer
PLL Clock
Prescaler
clk
I/O
43. The clock systems are detailed below.
General I/O
Modules
Oscillator
Crystal
clk
PllPresc
System Clock
Clock Switch
Control Unit
AVR Clock
Multiplexer
Prescaler
Clock
External Clock
Source clock
ADC
clk
ADC
clk
clk
Reset Logic
CPU Core
CPU
FLASH
ATmega16/32U4
Watchdog
Oscillator
Watchdog Timer
Watchdog
clock
RAM
“Power Manage-
Calibrated RC
Oscillator
Flash and
EEPROM
27

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