ATxmega16D4 Atmel Corporation, ATxmega16D4 Datasheet - Page 166
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ATxmega16D4
Manufacturer Part Number
ATxmega16D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega16D4
Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega16D4-AU
Manufacturer:
Atmel
Quantity:
438
Part Number:
ATxmega16D4-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega16D4-MH
Manufacturer:
Atmel
Quantity:
1 605
Company:
Part Number:
ATxmega16D4-MHR
Manufacturer:
SANYO
Quantity:
50
Part Number:
ATxmega16D4-MHR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
15.3.7
15.3.8
15.3.9
8210B–AVR–04/10
CNTL - Real Time Counter Register L
PERH - Real Time Counter Period Register High
PERL - Real Time Counter Period Register L
• Bits 7:0 - CNT[15:8]: Real Time Counter value High byte
These bits hold the 8 MSB of the 16-bit Real Time Counter value.
• Bits 7:0 - CNT[7:0]: Real Time Counter value Low byte
These bits hold the 8 LSB of the 16-bit Real Time Counter value.
The PERH and PERL register pair represents the 16-bit value PER. PER is constantly com-
pared with the counter value (CNT). A match will set the OVFIF in the INTFLAGS register and
clear CNT. Reading and writing 16-bit values require special attention, refer to
bits Registers” on page 12
Due to synchronization between RTC clock and the system clock domains, there is a latency of
two RTC clock cycles from updating the register until this has an effect. Application software
needs to check that the SYNCBUSY flag in the
on page 164
• Bits 7:0 - PER[15:8]: Real Time Counter Period High byte
These bits hold the 8 MSB of the 16-bit RTC top value.
• Bits 7:0 - PER[7:0]: Real Time Counter Period Low byte
These bits hold the 8 LSB of the 16-bit RTC top value.
Bit
+0x0B
Read/Write
Initial Value
Bit
+0x08
Read/Write
Initial Value
Bit
+0x0A
Read/Write
Initial Value
is cleared before writing to this register.
R/W
R/W
R/W
7
1
7
0
7
1
R/W
R/W
R/W
6
1
6
0
6
1
for details.
R/W
R/W
R/W
5
0
5
1
5
1
R/W
R/W
R/W
4
0
4
1
4
1
PER[15:8]
CNT[7:0]
PER[7:0]
”STATUS - Real Time Counter Status Register”
R/W
R/W
R/W
3
0
3
1
3
1
R/W
R/W
R/W
2
0
2
1
2
1
R/W
R/W
R/W
1
0
1
1
1
1
XMEGA D
R/W
R/W
R/W
”Accessing 16-
0
0
0
1
0
1
CNTL
PERH
PERL
166