ATxmega32A4 Atmel Corporation, ATxmega32A4 Datasheet - Page 234
ATxmega32A4
Manufacturer Part Number
ATxmega32A4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega32A4
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
7
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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20.7.4
20.8
20.9
Table 20-5.
8077H–AVR–12/09
Address
+0x00
+0x01
+0x02
+0x03
Offset
0x00
Register Summary
SPI Interrupt vectors
DATA - SPI Data Register
Name
SPI Interrupt vector and its offset word address
INTCTRL
STATUS
CTRL
DATA
SPI_vect
• Bit 6 - WRCOL: Write Collision Flag
The WRCOL bit is set if the DATA register is written during a data transfer. The WRCOL bit is
cleared by first reading the STATUS register with WRCOL set, and then accessing the DATA
register.
• Bit 5:0 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
The DATA register used for sending and receiving data. Writing to the register initiates the data
transmission, and the byte written to the register will be shifted out on the SPI output line. Read-
ing the register causes the Shift Register Receive buffer to be read, and return the last bytes
successfully received.
Source
CLK2X
Bit 7
Bit
+0x03
Read/Write
Initial Value
IF
-
ENABLE
WRCOL
Bit 6
R/W
-
7
0
Interrupt Description
SPI Interrupt vector
R/W
Bit 5
DORD
6
0
-
-
R/W
MASTER
5
0
Bit 4
-
-
DATA[7:0]
R/W
4
0
Bit 3
DATA[7:0]
-
-
MODE[1:0]
R/W
3
0
Bit 2
-
-
R/W
2
0
Bit 1
-
PRESCALER[1:0]
INTLVL[1:0]
R/W
1
0
XMEGA A
Bit 0
-
R/W
0
0
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DATA
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