ATxmega64D3 Atmel Corporation, ATxmega64D3 Datasheet - Page 202
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
ATxmega64D3
Manufacturer Part Number
ATxmega64D3
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64D3
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
18
Input Capture Channels
18
Pwm Channels
18
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATXMEGA64D3
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega64D3-AU
Manufacturer:
JST
Quantity:
1 000
Part Number:
ATxmega64D3-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega64D3-MH
Manufacturer:
Atmel
Quantity:
515
Table 18-1.
Note:
18.3.2
18.3.3
8210B–AVR–04/10
Operating Mode
Asynchronous Normal
Speed mode (CLK2X = 0)
Asynchronous Double
Speed mode (CLK2X = 1)
Synchronous and SPI
Master mode
1. The baud rate is defined to be the transfer rate in bit per second (bps)
External Clock
Double Speed Operation (CLK2X)
Equations for Calculating Baud Rate Register Setting
External clock is used in synchronous slave mode operation. The XCK clock input is sampled on
the Peripheral Clock frequency (f
meta-stability. The output from the synchronization register is then passed through an edge
detector. This process introduces a delay of two peripheral clock periods, and therefore the max-
imum external XCK clock frequency (f
Each high and low period the XCK clock cycles must be sampled twice by the Peripheral Clock.
If the XCK clock has jitter, or the high/low period duty cycle is not 50/50, the maximum XCK
clock speed must be reduced accordingly.
Double Speed operation can be enabled to allow for higher baud rates on lower peripheral clock
frequencies under asynchronous operation. When Double Speed operation is enabled the baud
rate for a given asynchronous baud rate setting as shown in
bled. In this mode the Receiver will use half the number of samples (reduced from 16 to 8) for
data sampling and clock recovery. Due to the reduced sampling more accurate baud rate setting
and peripheral clock are required. See
details on accuracy.
f
XCK
Conditions
BSCALE ≥ 0
BSCALE < 0
BSCALE ≥ 0
BSCALE < 0
f
f
f
f
f
BAUD
BAUD
BAUD
BAUD
BAUD
<
f
---------- -
PER
4
≤
≤
≤
≤
<
f
---------- -
f
---------- -
f
---------- -
f
---------- -
f
---------- -
PER
PER
PER
PER
PER
16
16
8
8
2
f
f
BAUD
BAUD
f
f
BAUD
BAUD
Equation for Calculation
PER
=
=
f
=
BAUD
=
------------------------------------------------------------------ -
16((2
--------------------------------------------------------------- -
8((2
) by a synchronization register to minimize the chance of
XCK
Baud Rate
-------------------------------------------------------------- -
2
------------------------------------------------------------- -
2
BSCALE
BSCALE
”Asynchronous Data Reception” on page 207
BSCALE
)is limited by the following equation:
=
BSCALE
------------------------------------ -
2
⋅
⋅
f
(
⋅
f
PER
f
8
BSEL
f
PER
16(
PER
⋅
PER
(1)
f
⋅
⋅
PER
BSEL )
(
BSEL )
BSEL
BSEL
+
1
+
)
+
+
+
1)
1
1)
1)
)
Table 18-1 on page 202
BSEL
BSEL
BSEL
BSEL
Equation for Calculation
BSEL
=
=
=
=
---------------------
2
------------------------------------------------ 1
2
BSEL Value
---------------------
2
-------------------------------------------- - 1
2
BSCALE
BSCALE
BSCALE
BSCALE
1
=
1
XMEGA D
------------------ - 1
2f
f
f
f
BAUD
PER
PER
PER
⎛
⎝
⋅
⎛
⎝
--------------------- - 1
16f
⋅ f
16
------------------ - 1
8f
8
f
f
BAUD
PER
PER
f
BAUD
BAUD
will be dou-
BAUD
–
for more
–
–
–
–
⎞
⎠
⎞
⎠
202