ATxmega64D3 Atmel Corporation, ATxmega64D3 Datasheet - Page 40
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ATxmega64D3
Manufacturer Part Number
ATxmega64D3
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64D3
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
18
Input Capture Channels
18
Pwm Channels
18
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATXMEGA64D3
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega64D3-AU
Manufacturer:
JST
Quantity:
1 000
Part Number:
ATxmega64D3-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega64D3-MH
Manufacturer:
Atmel
Quantity:
515
- Current page: 40 of 309
- Download datasheet (6Mb)
4.16.5
4.16.6
4.16.7
8210B–AVR–04/10
MCUCR – MCU Control Register
EVSYSLOCK – Event System Lock Register
AWEXLOCK – Advanced Waveform Extension Lock Register
• Bit 7:0 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 7:1 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 0 - EVSYS0LOCK:
Writing this bit to one will lock all registers in the Event System related to event channels 0 to 3
for further modifications. The following registers in the Event System are locked: CH0MUX,
CH0CTRL, CH1MUX, CH1CTRL, CH2MUX, CH2CTRL, CH3MUX, CH3CTRL. This bit is pro-
tected by the Configuration Change Protection mechanism, for details refer to
”Configuration Change Protection” on page
• Bit 7:1 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 0 - AWEXCLOCK: Advanced Waveform Extension Lock for TCC0
Writing this bit to one will lock all registers in the AWEXC module for Timer/Counter C0 for fur-
ther modifications. This bit is protected by the Configuration Change Protection mechanism, for
details refer to
Bit
+0x06
Read/Write
Initial Value
Bit
+0x08
Read/Write
Initial Value
Bit
+0x09
Read/Write
Initial Value
Section 3.12 ”Configuration Change Protection” on page
R
7
–
0
R
7
–
0
R
7
–
0
R
6
–
0
6
–
R
0
R
6
–
0
R
5
–
0
R
5
–
0
R
5
–
0
R
4
–
0
R
4
–
0
R
4
–
0
12.
3
–
R
0
R
3
–
0
R
3
–
0
R
2
–
0
R
2
–
0
2
–
R
0
R
1
–
0
1
–
R
0
R
1
–
0
12.
AWEXCLOCK
EVSYS0LOCK
R/W
R/W
0
0
0
0
XMEGA D
R
0
–
0
Section 3.12
EVSYSLOCK
AWEXLOCK
MCUCR
40
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