ATxmega64D3 Atmel Corporation, ATxmega64D3 Datasheet - Page 7
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ATxmega64D3
Manufacturer Part Number
ATxmega64D3
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64D3
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
18
Input Capture Channels
18
Pwm Channels
18
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATXMEGA64D3
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega64D3-AU
Manufacturer:
JST
Quantity:
1 000
Part Number:
ATxmega64D3-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega64D3-MH
Manufacturer:
Atmel
Quantity:
515
3.4
3.4.1
3.5
8210B–AVR–04/10
ALU - Arithmetic Logic Unit
Program Flow
Hardware Multiplier
The Program Memory is divided in two sections, the Application Program section and the Boot
Program section. Both sections have dedicated Lock bits for write and read/write protection. The
SPM instruction that is used for self-programming of the Application Flash memory must reside
in the Boot Program section. A third section exists inside the Application section. This section,
the Application Table section, has separate Lock bits for write and read/write protection. The
Application Table section can be used for storing non-volatile data or application software.
The Arithmetic Logic Unit (ALU) supports arithmetic and logic operations between registers or
between a constant and a register. Single register operations can also be executed. The ALU
operates in direct connection with all the 32 general purpose registers. In a typical single cycle
ALU operation, two operands are output from the Register File, the operation is executed, and
the result is stored back in the Register File.
In order to operate on data in the Data Memory, these must first be loaded into the Register File.
After the operation, the data can be stored from the Register File and back to the Data Memory.
The ALU operations are divided into three main categories - arithmetic, logical, and bit-functions.
After an arithmetic or logic operation, the Status Register is updated to reflect information about
the result of the operation.
The multiplier is capable of multiplying two 8-bit numbers into a 16-bit result. The hardware mul-
tiplier supports different variations of signed and unsigned integer and fractional numbers:
A multiplication takes two CPU clock cycles.
After reset, the program will start to execute from program address 0. Program flow is provided
by conditional and unconditional jump and call instructions, able to directly address the whole
address space. Most instructions have a single 16-bit word format. Every program memory
address contains a 16- or 32-bit instruction. The Program Counter (PC) addresses the location
from where instructions are fetched. During interrupts and subroutine calls, the return address
PC is stored on the Stack.
When an enabled interrupt occurs, the Program Counter is vectored to the actual interrupt vector
in order to execute the interrupt handling routine. Hardware clears the corresponding interrupt
flag automatically.
• Multiplication of unsigned integers.
• Multiplication of signed integers.
• Multiplication of a signed integer with an unsigned integer.
• Multiplication of unsigned fractional numbers.
• Multiplication of signed fractional numbers.
• Multiplication of a signed fractional number and with an unsigned.
XMEGA D
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