SAM3N2C Atmel Corporation, SAM3N2C Datasheet - Page 427

• Manufacturer Part Number: SAM3N2C
• Manufacturer: Atmel Corporation

Specifications of SAM3N2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 47
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

• WPKEY: Write Protect KEY
Should be written at value 0x50494F (“PIO” in ASCII). Writing any other value in this field aborts the write operation of the
WPEN bit. Always reads as 0.
26.7.47
Name:
Addresses:
Access:
Reset:
• WPVS: Write Protect Violation Status
0 = No Write Protect Violation has occurred since the last read of the PIO_WPSR register.
1 = A Write Protect Violation has occurred since the last read of the PIO_WPSR register. If this violation is an unauthorized
attempt to write a protected register, the associated violation is reported into field WPVSRC.
• WPVSRC: Write Protect Violation Source
When WPVS is active, this field indicates the write-protected register (through address offset or code) in which a write
access has been attempted.
Note:
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
31
—
23
15
—
7
Reading PIO_WPSR automatically clears all fields.
PIO Write Protect Status Register
30
—
22
14
—
PIO_WPSR
0x400E0EE8 (PIOA), 0x400E10E8 (PIOB), 0x400E12E8 (PIOC)
Read-only
See
6
Table 26-2
29
21
13
—
—
5
28
20
12
—
—
4
WPVSRC
WPVSRC
27
19
11
—
—
3
26
18
10
—
—
2
25
17
—
—
9
1
SAM3N
SAM3N
WPVS
24
16
—
8
0
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