SAM9261 Atmel Corporation, SAM9261 Datasheet - Page 385

• Manufacturer Part Number: SAM9261
• Manufacturer: Atmel Corporation

Specifications of SAM9261

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 160
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 31-11. Master Write with One, Two or Three Bytes Internal Address and One Data Byte
Figure 31-12. Master Read with One, Two or Three Bytes Internal Address and One Data Byte
31.7.6.2
385
TWD
TWD
TWD
TWD
TWD
TWD
Three bytes internal address
Two bytes internal address
One byte internal address
Three bytes internal address
Two bytes internal address
One byte internal address
AT91SAM9261
S
S
S
S
S
S
10-bit Slave Addressing
DADR
DADR
DADR
DADR
DADR
DADR
For a slave address higher than 7 bits, the user must configure the address size (IADRSZ) and
set the other slave address bits in the internal address register (TWI_IADR). The two remaining
Internal address bytes, IADR[15:8] and IADR[23:16] can be used the same as in 7-bit Slave
Addressing.
Example: Address a 10-bit device (10-bit device address is b1 b2 b3 b4 b5 b6 b7 b8 b9 b10)
Figure 31-13
the use of internal addresses to access the device.
Figure 31-13. Internal Address Usage
W
W
W
1. Program IADRSZ = 1,
2. Program DADR with 1 1 1 1 0 b1 b2 (b1 is the MSB of the 10-bit address, b2, etc.)
3. Program TWI_IADR with b3 b4 b5 b6 b7 b8 b9 b10 (b10 is the LSB of the 10-bit
W
W
W
address)
A
A
A
A
A
A
IADR(23:16)
IADR(15:8)
IADR(7:0)
below shows a byte write to an Atmel AT24LC512 EEPROM. This demonstrates
IADR(23:16)
IADR(15:8)
IADR(7:0)
R
S
T
A
T
M
S
B
Address
Device
A
A
A
0
IADR(15:8)
A
A
A
Sr
IADR(7:0)
S
B
L
W
W
R
T
E
R
I
/
C
A
K
DADR
WORD ADDRESS
IADR(15:8)
IADR(7:0)
M
S
B
DATA
FIRST
R
A
A
IADR(7:0)
Sr
A
A
A
A
A
C
K
WORD ADDRESS
SECOND
DADR
IADR(7:0)
P
DATA
DATA
A
L
S
B
C
A
K
Sr
R
A
A
DATA
N
A
DADR
DATA
P
DATA
P
DATA
A
C
K
O
6062N–ATARM–3-Oct-11
S
T
P
R
N
A
P
A
N
P
P